Intel 8051 manual Control Transfer

8051 Architectural Specification and Functional Description

CARRY	DECIMAL	PARITY
	CARRY

SYMBOLIC

ADDRESS: ,...:::.:-....,...I.,...;;:....,....;.,;....,.....;.;.;;.;..-r-..;.;.;..;..,.....;......,....--r--P..,

REGISTER:

USER	REGISTER BANK	RESERVED
FLAG	SELECT

PSW.7: CY: Carry Flag (also the C register)

PSW.6: AC: Auxiliary-Carry Flag

PSW.2: OV: Overflow Flag

PSW.O: P: Parity Flag

PSW.5: FO: User Flag 0

PSW.I: reserved

PSW.4: RSI: Register Select MSb

PSW.3: RSO: Register Select LSb

Unless otherwise stated, the instructions obey these rules: CY is set if the operation results in a carry out of (during addition) or a borrow into (during sub- traction) the high-order bit of the result; otherwise CY is cleared.

AC is set if the operation results in a carry out of the low-order four bits of the result (during addi- tion) or a borrow from the high-order bits into the low-order 4 bits (during subtraction); otherwise AC is cleared.

o V is set if the operation results in a carry into the high-order bit of the result but not a carry out of the high-order bit, or vice versa; otherwise OV is cleared. OV is of use in two's-complement arith- metic, since it becomes set when the signed result cannot be represented in 8 bits.

P is set if the module 2 sum of the eight bits in the accumulator is I (odd parity); otherwise P is cleared (even parity). When a value is written to the PSW register, the P bit remains unchanged, as it always reflects the parity of A.

Addition. Four addition operations are provided:

INC (increment) performs an addition of the source operand and one (I) and returns the result to the operand.

ADD performs an addition between the A register and the second source operand and returns the result to the A register.

ADDC (add with carry) performs an addition between the A register and the second source operand; adds one (1) if the C flag is found pre- viously set and returns the result to register A.

DA (decimal-add-adjust for BCD addition) per- forms a correction to the sum which resulted from the binary addition of two two-digit decimal operands. The packed decimal sum formed by DA is returned to A. The carry flag is set if the BCD result is greater than 99; else it is cleared.

Subtraction. Two subtraction operations are provided: SUBB (subtract with borrow) performs a subtrac- tion of the second source operand from the first

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operand (the accumulator), subtracts one (I) if the C flag is found previously set and returns the result to the A register.

DEC (decrement) performs a subtraction of one

(1)from the source operand and returns the results to the operand.

Multiplication.

MUL performs an unsigned multiplication of the A register by the B register, returning a double- byte result. Register A receives the low-order byte, B receives the high-order byte. OV is cleared if the top half of the result is zero and is set if it is non-zero. C is cleared. AC remains unaltered.

Division.

DIV performs an unsigned division of the A register by the B register and returns the integer quotient to register A and returns the fractional remainder to the B register. Division by zero leaves indeterminate data in registers A and B and sets OV, otherwise OV is cleared. C is cleared. AC remains unaltered.

CONTROL TRANSFER

There are' three classes of control transfer operations: unconditional calls, returns and jumps; conditional jumps; and interrupts. All control transfer operations cause, some upon a specific condition, the program execution to continue at a noIf-sequential location in program memory.

Unconditional Calls, Returns and Jumps. Unconditional calls, returns and jumps transfer control from the current value of the Program Counter to the target address. Both direct and indirect transfers are supported. The three transfer operations are described below.

ACALL and LCALL push the address of the next instruction onto the stack (PCL to low-order address, PCH to high-order address) and then transfer control to the target address. Absolute Call is a 2-byte instruction used when the target address is in the current 2K page. Long Call is a 3-byte instruction that addresses the full 64K program space. In ACALL, immediate data (i.e. an II bit address field) is concatenated to the five most significant bits of the PC (which is pointing to the next instruction). If ACALL is in the last 2 bytes of a 2K page then the call will be made to the next page since the PC will have been incremented to the next instruction prior to execution.

RET transfers control to the return address saved on the stack by a previous call operation and decrements the SP register by two (2) to adjust the SP for the popped address.

AJMP, LJMP and SJMP transfer control tothe target operand. The operation of AJ M P and LJMP are analogous to ACALL and LCALL.

AFN-01488A-24