USB Register Definitions
The following sections provide the USB register definitions. In these sections:
The register mnemonic is provided for reference purposes.
The register address shown is the address location of the register in the CRB. The initialization value shown is the register’s initialization value at reset.
Interrupt Status Register
The Interrupt Status register contains bits for each of the interrupt sources in the USB. Each bit is qualified with its respective interrupt enable bits. All bits of the register are logically OR’ed together to form a single interrupt source for the microprocessor. Once an interrupt bit has been set, it can only be cleared by writing a one to the respective interrupt bit.
The Interrupt Mask contains enable bits for each of the interrupt sources within the USB. Setting any of these bits will enable the respective interrupt source in the register. This register contains the hex value 0000 after a reset (all interrupts disabled).
Table 4-8. Interrupt Status Register
| BIT |
| 15 | 14 | 13 |
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| 12 | 11 |
| 10 | 9 | 8 |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| OFFSET |
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| 00h |
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| FIELD |
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| Interrupt Mask |
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| Interrupt Status |
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| STALL | ATTACH | RESUME |
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| SLEEP | TOK_DNE |
| SOF_TOK | ERROR | USB_RST |
| STALL | ATTACH | RESUME | SLEEP | TOK_DNE | SOF_TOK | ERROR | USB_RST |
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| RESET |
| 0 | 0 | 0 |
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| 0 | 0 | 0 |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| RW |
| RW | RW | RW |
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| RW | RW |
| RW | RW | RW |
| RW | RW | RW | RW | RW | RW | RW | RW |
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Table 4-9. 16- Interrupt Status Register Definitions
| Bits | Field Name | Description |
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| 15 | STALL | Enable/Disable STALL Interrupt |
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| 1 | = enable the STALL interrupt. |
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| 0 | = disable the STALL interrupt (default). |
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| 14 | ATTACH | Enable/Disable ATTACH Interrupt |
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| 1 | = enable the ATTACH interrupt. |
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| 0 | = disable the ATTACH interrupt (default). |
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| 13 | RESUME | Enable/Disable RESUME Interrupt |
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| 1 | = enable the RESUME interrupt. |
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| 0 | = disable the RESUME interrupt (default). |
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| 12 | SLEEP | Enable/Disable SLEEP Interrupt |
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| 1 | = enable the SLEEP interrupt. |
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| 0 | = disable the SLEEP interrupt (default). |
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| 11 | TOK_DNE | Enable/Disable TOK_DNE Interrupt |
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| 1 | = enable the TOK_DNE interrupt. |
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| 0 | = disable the TOK_DNE interrupt (default). |
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| 10 | SOF_TOK | Enable/Disable SOF_TOK Interrupt |
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| 1 | = enable the SOF_TOK interrupt. |
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| 0 | = disable the SOF_TOK interrupt (default). |
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| 9 | ERROR | Enable/Disable ERROR Interrupt |
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| 1 | = enable the ERROR interrupt. |
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| 0 | = disable the ERROR interrupt (default). |
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