Frame Reference Register
The Frame Reference register contains information of the current bit of the CAN message. A frame reference pointer indicates the current bit position. This enables message tracing on bit level.
Note: The reset value of this register’s bits is indeterminate.
Table 5-64. Frame Reference Register
BIT | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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| 7Ah |
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FIELD | STUFF IND |
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| RX_BIT | TX_BIT | FR4 | FR3 | FR2 | FR1 | FR0 | RX_MOD | TX_MOD | FRB5 | FRB4 | FRB3 | FRB2 | FRB1 | FRB0 | |
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RESET | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − |
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
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| Bits | Field Name | Description | |
| 15 | STUFFIND | Stuff Bit Inserted | |
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| 1 = a stuff bit has been inserted. | |
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| 0 = idle. | |
| 14 | RX_BIT | Bit State on the Receiver Line | |
| 13 | TX_BIT | Bit State on the Transmitter Line | |
| 12:8 | FR[4:0] | frame_ref_Field | |
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| This is the frame reference a incoming or outgoing CAN message. | |
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| It is coded as follows: | |
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| 00000 | = stopped |
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| 00001 | = synchronize |
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| 00101 | = interframe |
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| 00110 | = bus_idle |
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| 00111 | = start_of_frame |
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| 01000 | = arbitration |
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| 01001 | = control |
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| 01010= data | |
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| 01011 | = crc |
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| 01100 | = ack |
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| 01101 | = end_of_frame |
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| 10000 | = error_flag |
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| 10001 | = error_echo |
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| 10010 | = error_del: |
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| 11000 | = overload_flag |
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| 11001 | = overload_echo |
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| 11010 | = overload_del |
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| Other codes are not used. | |
| 7 | RX_MOD | RX Mode | |
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| 1 = receiving data. | |
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| 0 = not in RX mode (transmitting or idle). | |
| 6 | TX_MOD | TX Mode | |
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| 1 = transmitting data. | |
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| 0 = not in TX mode (receiving or idle). |
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