Table 4-4. BDT Data Used by USB Controller and Microprocessor
USB Controller Determines… | Microprocessor Determines… |
Who owns the buffer in system memory | Who owns the buffer in system memory |
Data0 or Data1 PID | Data0 or Data1 PID |
Release Own upon packet completion |
|
No address increment (FIFO Mode) |
|
Data Toggle Synchronization enable |
|
Amount of data to be transmitted or received | Amount of data transmitted or received |
Where the buffer resides in system memory | Where the buffer resides in system memory |
Table
Table 4-5. USB Buffer Descriptor Format
|
| 7 |
|
| 6 |
|
| 5 |
|
| 4 |
|
| 3 |
|
| 2 |
|
| 1 |
|
| 0 |
|
|
| OWN |
|
| DATA0/1 |
|
| USB_OWN |
|
| NINC |
| DTS |
|
| RSVD |
| 0 |
| 0 |
| |||
|
|
|
|
|
|
|
|
|
| 0 |
|
|
|
|
|
|
|
|
|
|
|
|
| |
|
|
|
|
|
|
|
|
|
| BC[7:0] |
|
|
|
|
|
|
|
|
|
|
| |||
|
|
|
|
|
| 0 |
|
|
|
|
|
|
|
|
|
|
| BCH9 |
|
| BCH8 |
| ||
Low Byte |
|
|
|
|
|
|
| ADDR[7:0] |
|
|
|
|
|
|
|
|
|
|
| |||||
Byte 2 |
|
|
|
|
|
|
| ADDR[15:8] |
|
|
|
|
|
|
|
|
|
| ||||||
Byte 3 |
|
|
|
|
|
| ADDR[23:16] |
|
|
|
|
|
|
|
|
|
| |||||||
Byte 4 |
|
|
|
|
|
| ADDR[31:24] |
|
|
|
|
|
|
|
|
|
|
35