SUPER MICRO Computer 6014P-8 Dram Data Integrity Mode, ECC Error Type, Serr Signal Condition

SUPERSERVER 6014P-8/6014P-8R/6014P-82R/6014P-82 User's Manual

DRAM Data Integrity Mode

If enabled, this feature allows the data stored in the DRMA memory to be integrated for faster data processing. The options are 72-bit ECC, 144-bit ECC, Auto and Disabled.

ECC Error Type

This setting lets you select which type of interrupt to be activated as a result of an ECC error. The options are None, NMI (Non-Maskable Interrupt), SMI (System Management Interrupt) and SCI (System Control Interrupt.)

SERR Signal Condition

This setting specifies the ECC Error conditions that an SERR# is to be asserted. The options are None, Single Bit, Multiple Bit and Both.

USB Device

This setting allows you to Enable or Disable all functions for the USB devices specified.

Legacy USB Support

This setting allows you to enable support for Legacy USB devices. The settings are Enabled and Disabled.

Advanced Processor Options

Access the submenu to make changes to the following settings.

CPU Speed

This is a display that indicates the speed of the installed processor.

Hyper-threading

This setting allows you to Enable or Disable the hyper-threading function. Enabling hyper-threading results in increased CPU performance. (Applicable for XP systems.)

Machine Checking

Enable to allow the operating system to debug a system crash after a reset. The options are Disabled and Enabled.

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