Texas Instruments MSC1210 manual Advanced Flash Memory, Write Protecting Flash Program Memory

Advanced Flash Memory

15.2 Advanced Flash Memory

Flash memory may be configured as data memory, program memory, or both.

15.2.1 Write Protecting Flash Program Memory

Flash program memory may be protected against your program overwriting it by writing to flash memory during program execution. This provides a safeguard to the integrity of the code against intentional or accidental manipulation by your program.

By setting the Program Memory Lock (PML) bit in HCR0, all of flash program memory is write-protected inasmuch as your program modifying flash program memory is concerned. When this bit is set, your program is not able to write to any area of flash memory that has been partitioned as flash program memory.

Likewise, by setting the Reset Sector Lock (RSL) bit in HCR, the first 4k of flash program memory will be write-protected inasmuch as your program modifying that area of flash program memory is concerned. This is functionality identical to the PML bit, but the RSL bit only applies to the first 4k of flash program memory, whereas the PML bit applies to all of flash program memory. By clearing PML and setting RSL, the first 4k of flash program memory is locked against all writes by your program, but the rest of flash program memory is accessible to memory writes.

If writing to flash program memory is permitted by the PML and RSL bits, your program must first set the MXWS bit of MWS (8FH) prior to writing to flash program memory. If this bit is not set, writes to flash program memory are not effective.

15.2.2 Updating Interrupts with Reset Sector Lock

If the Reset Sector Lock (RSL) bit in HCR0 has been set, the user program will not be able to modify the contents of the first 4k of flash program memory. Set- ting RSL makes it impossible to change where the ISRs will branch to when triggered because the interrupt service routine vectors are all located in the first bytes of flash program memory.

If RSL needs to be set, but the interrupt service routines also need to be able to change , it is recommended that the ISRs in the reset sector simply branch to the same address, plus 4k. At the resulting branch address, the the user will be able to jump to wherever the ISR is actually located, and will also be able to modify that jump because it is not contained in the reset sector.

For example, given an external 0 interrupt that branches to 0003H when trig- gered, the following code could be implemented:

CSEG AT		0003h	;Address of External 0 Interrupt
LJMP Ext0ISR			;Jump to the interrupt vector		at 0003h + 4k
CSEG	AT	1003h	;Ext0 jump vector, outside of		reset sector
LJMP	Ext0Code		;Jump	to wherever the real Ext. 0 interrupt
			;code	is

Thus, If the external 0 interrupt code needs to be changed later, simply change the instruction at 1003H to jump to the new code. Both the code and the jump at 1003H can be updated as desired because both are outside of the reset sector.

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