System Timers

7.2.2.2One Hundred Millisecond Clock

The one hundred millisecond clock is used by the MSC1210 in order to estab- lish a 10Hz clock. This clock is not directly outputted by the MSC1210; it is used as the input into the seconds auxiliary interrupt and also is used by the watch- dog timer. The 100ms clock uses the output of the millisecond clock (MSECH/ MSECL) as an input, so its correct operation assumes that the millisecond clock has been set to a value that in fact generates a millisecond clock.

The HMSEC (FEH) SFR is used to indicate how many millisecond clocks amount to 100ms (1/10th of a second), less 1. Therefore, assuming the milli- second clock is correctly configured to generate a 1kHz clock, HMSEC would be set to 99 (decimal) in order to generate an accurate, 100ms clock.

7.2.2.3Seconds Auxiliary Interrupt

The seconds auxiliary interrupt is one of the auxiliary interrupts that may be used by the user program. The seconds auxiliary interrupt is enabled by set- ting ESEC (AIE.7) and enabling auxiliary interrupts via the EAI (EICON.5) bit. The frequency at which the seconds interrupt will be triggered is controlled by the value written to the SECINT (F9H) SFR.

When enabled, a seconds auxiliary interrupt will be triggered after SECINT + 100ms, assuming the MSECH/MSECL and HMSEC SFRs have been configured to produce a correct 100ms clock. The value written to the SECINT SFR is between 0 and 127, meaning that the milliseconds interrupt may be triggered every 100ms to 12.8 seconds (assuming a correct 100ms clock).

For example, given an accurate 100ms clock, setting SECINT to 15 would produce a seconds auxiliary interrupt every 1.6 seconds.

Bit 7 of SECINT, when written, indicates whether the SECINT value being written should be written immediately, or if it should be written after the current SECINT count has expired. If bit 7 is set, SECINT will immediately be updated with the new value; if it is clear, SECINT will be updated with the new value as soon as the current seconds count has expired.

7.2.2.4Watchdog Timer

The functioning of the watchdog timer is fully described in section 14.3. How- ever, it is important to keep in mind that the watchdog timer is dependent on the 100ms timer. The length of the watchdog timer is directly dependent on the 100ms timer being configured to a reasonable value because the watchdog timer frequency is configured in WDTCON (FFH) using units of HMSEC.

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Texas Instruments MSC1210 manual One Hundred Millisecond Clock