Ampro Corporation COM 830 Native vs. Compatible IDE mode, Intel Processor Features, Native Mode

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Chapter 2

Specifications

Native vs. Compatible IDE mode

Compatible Mode

When operating in compatible mode, the SATA and PATA (Parallel ATA) controller together need two legacy IRQs (14 and 15) and are unable to share these IRQs with other devices. This is a result of the fact that the SATA and PATA controller emulate legacy IDE controllers.

Native Mode

Native mode allows the SATA and PATA controllers to operate as true PCI devices and therefore do not need dedicated legacy resources, which means it can be configured anywhere within the system. When either the SATA or PATA controller runs in native mode it only requires one PCI interrupt for both channels and also has the ability to share this interrupt with other devices in the system. Setting Enhanced mode in the BIOS setup program will automatically enable Native mode as Native mode is a subset of Enhanced mode.

Running in native mode frees up interrupt resources (IRQs 14 and 15) and decreases the chance that there may be a shortage of interrupts when installing devices.

NOTE If your operating system supports native mode then Ampro recommends you enable it.

Intel® Processor Features

Thermal Monitor and Catastrophic Thermal Protection

Intel® Core™ 2 Duo, Core™ Duo and Celeron M processors have a thermal monitor feature that helps to control the processor temperature. The integrated TCC (Thermal Control Circuit) activates if the processor silicon reaches its maximum operating temperature. The activation temperature, that the Intel Thermal Monitor uses to activate the TCC, cannot be configured by the user nor is it software visible.

The Thermal Monitor can control the processor temperature through the use of two different methods defined as TM1 and TM2. TM1 method consists of the modulation (starting and stopping) of the processor clocks at a 50% duty cycle. The TM2 method initiates an Enhanced Intel Speedstep transition to the lowest performance state once the processor silicon reaches the maximum operating temperature.

NOTE The maximum operating temperature for Intel Core™ 2 Duo, Core™ Duo and Celeron M processors is 100°C. TM2 mode is used for Intel Core 2 Duo and Core Duo processors, it is not supported by Intel Celeron M processors.

Two modes are supported by the Thermal Monitor to activate the TCC. They are called Automatic and On- Demand. No additional hardware, software, or handling routines are necessary when using Automatic Mode.

NOTE To ensure that the TCC is active for only short periods of time thus reducing the impact on processor performance to a minimum, it is necessary to have a properly designed thermal solution. The Intel Core 2 Duo, Core™ Duo and Celeron M processor's respective datasheet can provide you with more information about this subject.

THERMTRIP# signal is used by Intel's Intel Core 2 Duo, Core Duo and Celeron M processors for catastrophic thermal protection. If the processor's silicon reaches a temperature of approximately 125°C then the processor signal THERMTRIP# will go active and the system will automatically shut down to prevent

COM 830

Reference Manual

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Contents COM Computer-On-Module Reference Manual Audience Contents Ahci RAID Appendix a Bios Setup DescriptionList of Tables AC97/Intel High Definition Audio Link Signals DescriptionsWarranty SymbolsTerminology Term DescriptionPCI COM Express ConceptTechnical Support Lead-Free Designs RoHS CertificationElectrostatic Sensitive Device COM 830 Options InformationReference Manual COM Feature List Power Mechanical DimensionsUsable Memory Supported Operating SystemsPower Consumption Supply Voltage Standard PowerElectrical Characteristics Electrostatic Sensitive DeviceProcessor Information Environmental Specifications Intel 82945GM Block DiagramHeatspreader Heatspreader Dimensions Primary Connector Rows a and B Connector Subsystems Rows A, B, C, DPCI Express Power ControlExpressCard Graphics Output VGA/CRTAdditional Features Power Supply Implementation GuidelinesOnboard Microcontroller Embedded BiosSimplified Overview of Bios Setup Data Backup Comparison of I/O Apic to 8259 PIC Interrupt mode Security FeaturesSuspend to Ram Ampro Tech NotesIntel Processor Features Native vs. Compatible IDE modeCompatible Mode Native ModeIntel Processor Performance ControlIntel Virtualization Technology Thermal ManagementPassive Cooling Active Cooling Acpi Suspend Modes and Resume EventsCritical Trip Point ΔP% = TC1Tn-Tn-1 + TC2Tn-TtSMBALERT# GPI2#WAKE# PME# USB 2.0 Ehci Host Controller Support Routing DiagramPcie DDCPDS Connector Signal Descriptions Comment Gigabit Ethernet DescriptionSATA2RX SATA2RX+SATA2TX+ SATA2TXPCIE3TX PCIE3TX+PCIE4RX+ PCIE4RXUSB0 USB0+USB1+ USB1Vgared USB7Vgagrn Commen Tvdacb BiosdisableTvdacc I2CCKCBRESET# SysresetPWRBTN# PwrokSignal Description Comment Pin Row a Row B Connector PinoutLVDSA2+ Rsvd EF+ BIOSDISABLE#LVDSB2+ GND Fixed LVDSA2EXCD1PERST# SYSRESET#EXCD0PERST# EXCD1CPPE#PCITRDY# PCIRESET#PCISTOP# PciparPEGENABLE# IderesetIDEIOR# IdereqPcie Sdvobred SDVOBRED+SDVOBGRN+ Pcie SdvobgrnTYPE2# TYPE1# TYPE0# TypePin Row C Row D PEGTX12+ PEGRX12+PCIAD16 PEGRX12Signal Description of Boot Strap Signal Boot Strap SignalsAudio Serial Data Out This signal AC ’97/Intel High DefinitionSystem Resources BiosAddress Assignment System Memory Map0CFC 0CFF Address hex Size Available DescriptionAvailable Typical Interrupt Source Connected to Pin Interrupt Request IRQ LinesPIC IRQ14 PCI Configuration Space MapIRQ15 29. PCI Configuration Space Map Azalia PCI Interrupt Routing MapMode Native Bus²C Bus PCI Bus MastersSM Bus Native Root PortSetup Menu and Navigation Entering the Bios Setup ProgramBoot Selection Popup Manufacturer Default SettingsFeature Options Description Main Setup ScreenBios ID ESCAdvanced Setup Yes Acpi Configuration SubmenuAcpi PCI Configuration Submenu Win XP Watchdog Acpi Event restart configurationEnabled, 8MB Graphics Configuration SubmenuPCI IRQ Resource Exclusion Submenu PCI Interrupt Routing SubmenuCRT + LFP CRT + SdvoLFP SDVO-B SDVO-C LFP SDVO-C SDVO-BDVI PAL Bios Secam SMPTE240MCRT Lvds NtscCPU Configuration Submenu Bios Setup Description Ioapic Chipset Configuration SubmenuApic Acpi SCI IRQ Interface Configuration Submenu Disabled SIO Winbond W83627 Configuration3F8/IRQ4 2F8/IRQ3IDE Configuration Submenu Clock ConfigurationRAID IDEHost&Device Atapi Cdrom Primary/Secondary IDE Master/Slave SubmenuA.R.T CD/DVDEnabled HiSpeed USB Configuration SubmenuUSB Mass Storage Device Configuration Submenu Keyboard/Mouse Configuration SubmenuCD-ROM Bios Post Remote Access Configuration SubmenuCOM2 Ansi+5VSB Hardware Monitoring SubmenuVbat NMI Watchdog Configuration SubmenuBoot Setup USB Cdrom Boot Device PriorityPCI RAID Boot Settings Configuration Security Setup Hard Disk Security Security SettingsHard Disk Security User Password Power SetupAPM Updating the Bios Additional Bios FeaturesBios Recovery Hard Disk Security Features Bios Security FeaturesSerial Port and Console Redirection Specification Link Industry SpecificationsLPC Reference Manual COM Method Contact Information Appendix a Technical SupportAppendix a