Ampro Corporation COM 830 manual Signal Description Comment

Page 41

Chapter 3

 

 

 

 

Signals and Pinout Tables

Table 3-14. Power and System Management Signal Descriptions (Continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SUS_S3#

Indicates system is in Suspend to RAM state.

O 3.3VSB

PU 10k

 

 

 

 

Active low output. Also known as "PS_ON"

 

 

3.3VSB

 

 

 

 

and can be used to control an ATX power

 

 

 

 

 

 

 

 

supply.

 

 

 

 

 

 

 

SUS_S4#

Indicates system is in Suspend to Disk state.

O 3.3VSB

PU 10k

Not

 

 

 

Active low output.

 

 

3.3VSB

supported

 

 

SUS_S5#

Indicates system is in Soft Off state.

O 3.3VSB

PU 10k

 

 

 

 

 

 

 

 

3.3VSB

 

 

 

WAKE0#

PCI Express wake up signal.

I 3.3VSB

PU 10k

 

 

 

 

 

 

 

 

3.3VSB

 

 

 

WAKE1#

General purpose wake up signal. May be used

I 3.3VSB

PU 10k

 

 

 

 

to implement wake-up on PS/2 keyboard or

 

 

3.3VSB

 

 

 

 

mouse activity.

 

 

 

 

 

 

 

BATLOW#

Battery low input. This signal may be driven

I 3.3VSB

PU 10k

 

 

 

 

low by external circuitry to signal that the

 

 

3.3VSB

 

 

 

 

system battery is low, or may be used to signal

 

 

 

 

 

 

 

 

some other external power-management event.

 

 

 

 

 

 

 

THRM#

Input from off-module temp sensor indicating

I 3.3V

PU 10k

 

 

 

 

an over-temp situation.

 

 

3.3V

 

 

 

THERMTRIP

Active low output indicating that the CPU has

O 3.3V

PU 10k

 

 

 

#

entered thermal shutdown.

 

 

3.3V

 

 

 

SMB_CK

System Management Bus bidirectional clock

I/O

PU 2k2

 

 

 

 

line. Power sourced through 5V standby rail

3.3VSB

3.3VSB

 

 

 

 

and main power rails.

 

 

 

 

 

 

 

SMB_DAT#

System Management Bus bidirectional data

I/O

PU 2k2

 

 

 

 

line. Power sourced through 5V standby rail

3.3VSB

3.3VSB

 

 

 

 

and main power rails.

 

 

 

 

 

 

 

SMB_ALERT

System Management Bus Alert – active low

I 3.3VSB

PU 10k

 

 

 

#

input can be used to generate an SMI# (System

 

 

3.3VSB

 

 

 

 

Management Interrupt) or to wake the system.

 

 

 

 

 

 

 

 

Power sourced through 5V standby rail and

 

 

 

 

 

 

 

 

main power rails.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 3-15. Power and GND Signal Descriptions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Signal

 

Description

 

I/O

 

PU/

Comment

 

 

 

 

 

 

 

 

PD

 

 

 

VCC_12V

 

Primary power input: +12V nominal. All

 

P

 

 

 

 

 

 

 

available VCC_12V pins on the connector(s)

 

 

 

 

 

 

 

 

shall be used.

 

 

 

 

 

 

 

VCC_5V_SBY

 

Standby power input: +5.0V nominal. If

 

P

 

 

 

 

 

 

 

VCC5_SBY is used, all available

 

 

 

 

 

 

 

 

 

VCC_5V_SBY pins on the connector(s) shall

 

 

 

 

 

 

 

 

be used. Only used for standby and suspend

 

 

 

 

 

 

 

 

functions. May be left unconnected if these

 

 

 

 

 

 

 

 

functions are not used in the system design.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

COM 830

Reference Manual

35

Image 41
Contents COM Computer-On-Module Reference Manual Audience Contents Ahci RAID Appendix a Bios Setup DescriptionList of Tables AC97/Intel High Definition Audio Link Signals DescriptionsWarranty SymbolsTerminology Term DescriptionPCI COM Express ConceptTechnical Support Lead-Free Designs RoHS CertificationElectrostatic Sensitive Device COM 830 Options InformationReference Manual COM Feature List Power Mechanical DimensionsUsable Memory Supported Operating SystemsPower Consumption Supply Voltage Standard PowerElectrical Characteristics Electrostatic Sensitive DeviceProcessor Information Environmental Specifications Intel 82945GM Block DiagramHeatspreader Heatspreader Dimensions Primary Connector Rows a and B Connector Subsystems Rows A, B, C, DPCI Express Power ControlExpressCard Graphics Output VGA/CRTAdditional Features Power Supply Implementation GuidelinesOnboard Microcontroller Embedded BiosSimplified Overview of Bios Setup Data Backup Comparison of I/O Apic to 8259 PIC Interrupt mode Security FeaturesSuspend to Ram Ampro Tech NotesIntel Processor Features Native vs. Compatible IDE modeCompatible Mode Native ModeIntel Processor Performance ControlPassive Cooling Thermal ManagementIntel Virtualization Technology Active Cooling Acpi Suspend Modes and Resume EventsCritical Trip Point ΔP% = TC1Tn-Tn-1 + TC2Tn-TtWAKE# PME# GPI2#SMBALERT# USB 2.0 Ehci Host Controller Support Routing DiagramPDS DDCPcie Connector Signal Descriptions Comment Gigabit Ethernet DescriptionSATA2RX SATA2RX+SATA2TX+ SATA2TXPCIE3TX PCIE3TX+PCIE4RX+ PCIE4RXUSB0 USB0+USB1+ USB1Vgagrn USB7Vgared Commen Tvdacb BiosdisableTvdacc I2CCKCBRESET# SysresetPWRBTN# PwrokSignal Description Comment Pin Row a Row B Connector PinoutLVDSA2+ Rsvd EF+ BIOSDISABLE#LVDSB2+ GND Fixed LVDSA2EXCD1PERST# SYSRESET#EXCD0PERST# EXCD1CPPE#PCITRDY# PCIRESET#PCISTOP# PciparPEGENABLE# IderesetIDEIOR# IdereqPcie Sdvobred SDVOBRED+SDVOBGRN+ Pcie SdvobgrnTYPE2# TYPE1# TYPE0# TypePin Row C Row D PEGTX12+ PEGRX12+PCIAD16 PEGRX12Signal Description of Boot Strap Signal Boot Strap SignalsAudio Serial Data Out This signal AC ’97/Intel High DefinitionSystem Resources BiosAddress Assignment System Memory Map0CFC 0CFF Address hex Size Available DescriptionPIC Interrupt Request IRQ LinesAvailable Typical Interrupt Source Connected to Pin IRQ15 PCI Configuration Space MapIRQ14 29. PCI Configuration Space Map Azalia PCI Interrupt Routing MapMode Native Bus²C Bus PCI Bus MastersSM Bus Native Root PortSetup Menu and Navigation Entering the Bios Setup ProgramBoot Selection Popup Manufacturer Default SettingsFeature Options Description Main Setup ScreenBios ID ESCAdvanced Setup Acpi Acpi Configuration SubmenuYes PCI Configuration Submenu Win XP Watchdog Acpi Event restart configurationEnabled, 8MB Graphics Configuration SubmenuPCI IRQ Resource Exclusion Submenu PCI Interrupt Routing SubmenuCRT + LFP CRT + SdvoLFP SDVO-B SDVO-C LFP SDVO-C SDVO-BDVI PAL Bios Secam SMPTE240MCRT Lvds NtscCPU Configuration Submenu Bios Setup Description Apic Acpi SCI IRQ Chipset Configuration SubmenuIoapic Interface Configuration Submenu Disabled SIO Winbond W83627 Configuration3F8/IRQ4 2F8/IRQ3IDE Configuration Submenu Clock ConfigurationRAID IDEHost&Device Atapi Cdrom Primary/Secondary IDE Master/Slave SubmenuA.R.T CD/DVDEnabled HiSpeed USB Configuration SubmenuCD-ROM Keyboard/Mouse Configuration SubmenuUSB Mass Storage Device Configuration Submenu Bios Post Remote Access Configuration SubmenuCOM2 AnsiVbat Hardware Monitoring Submenu+5VSB NMI Watchdog Configuration SubmenuBoot Setup PCI RAID Boot Device PriorityUSB Cdrom Boot Settings Configuration Security Setup Hard Disk Security Security SettingsAPM Power SetupHard Disk Security User Password Bios Recovery Additional Bios FeaturesUpdating the Bios Serial Port and Console Redirection Bios Security FeaturesHard Disk Security Features LPC Industry SpecificationsSpecification Link Reference Manual COM Method Contact Information Appendix a Technical SupportAppendix a