Ampro Corporation COM 830 manual Address hex Size Available Description, 0CFC 0CFF

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Chapter 3Signals and Pinout Tables

Table 3-26. I/O Address Assignment

I/O Address (hex)

Size

Available

Description

0000

- 00FF

256 bytes

No

Motherboard resources

0100

- 010F

16 bytes

No

Ampro System Control

0170

- 0177

8 bytes

No

Secondary IDE channel

01F0 - 01F7

8 bytes

No

Primary IDE channels

0376

 

1 byte

No

Secondary IDE channel command

 

 

 

 

 

port

0377

 

1 byte

No

Secondary IDE channel status port

03B0 – 03DF

16 bytes

No

Video system

03F6

 

1 byte

No

Primary IDE channel command port

03F7

 

1 byte

No

Primary IDE channel status port

0480

– 04BF

64 bytes

No

Motherboard resources

04D0 – 04D1

2 bytes

No

Motherboard resources

0800

– 087F

128 bytes

No

Motherboard resources

0CF8 - 0CFB

4 bytes

No

PCI configuration address register

0CFC - 0CFF

4 bytes

No

PCI configuration data register

0D00 – FFFF

 

See note

PCI / PCI Express bus

 

 

 

 

NOTE The BIOS assigns PCI and PCI Express I/O resources from FFF0h downwards. Non

 

 

 

PnP/PCI/PCI Express compliant devices must not consume I/O resources in that

 

 

 

area.

 

 

 

 

 

 

 

 

 

 

 

LPC Bus

On the COM 830 the PCI Bus acts as the subtractive decoding agent. All I/O cycles that are not positively decoded are forwarded to the PCI Bus not the LPC Bus. Only specified I/O ranges are forwarded to the LPC Bus. In the BIOS the following I/O address ranges are sent to the LPC Bus:

280 – 2FF

3F8 – 3FF

3E8 – 3EF

A00 - A0F

Parts of these ranges are not available if a Super I/O is used on the carrier board. If a Super I/O is not implemented on the carrier board then these ranges are available for customer use. If you require additional LPC Bus resources other than those mentioned above, or more information about this subject, contact Ampro technical support for assistance.

COM 830

Reference Manual

47

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Contents COM Computer-On-Module Reference Manual Audience Contents Ahci RAID Appendix a Bios Setup DescriptionList of Tables AC97/Intel High Definition Audio Link Signals DescriptionsWarranty SymbolsTerminology Term DescriptionPCI COM Express ConceptTechnical Support Lead-Free Designs RoHS CertificationElectrostatic Sensitive Device COM 830 Options InformationReference Manual COM Feature List Power Mechanical DimensionsUsable Memory Supported Operating SystemsPower Consumption Supply Voltage Standard PowerElectrical Characteristics Electrostatic Sensitive DeviceProcessor Information Environmental Specifications Intel 82945GM Block DiagramHeatspreader Heatspreader Dimensions Primary Connector Rows a and B Connector Subsystems Rows A, B, C, DPCI Express Power ControlExpressCard Graphics Output VGA/CRTAdditional Features Power Supply Implementation GuidelinesOnboard Microcontroller Embedded BiosSimplified Overview of Bios Setup Data Backup Comparison of I/O Apic to 8259 PIC Interrupt mode Security FeaturesSuspend to Ram Ampro Tech NotesIntel Processor Features Native vs. Compatible IDE modeCompatible Mode Native ModeIntel Processor Performance ControlPassive Cooling Thermal ManagementIntel Virtualization Technology Active Cooling Acpi Suspend Modes and Resume EventsCritical Trip Point ΔP% = TC1Tn-Tn-1 + TC2Tn-TtWAKE# PME# GPI2#SMBALERT# USB 2.0 Ehci Host Controller Support Routing DiagramPDS DDCPcie Connector Signal Descriptions Comment Gigabit Ethernet DescriptionSATA2RX SATA2RX+SATA2TX+ SATA2TXPCIE3TX PCIE3TX+PCIE4RX+ PCIE4RXUSB0 USB0+USB1+ USB1Vgagrn USB7Vgared Commen Tvdacb BiosdisableTvdacc I2CCKCBRESET# SysresetPWRBTN# PwrokSignal Description Comment Pin Row a Row B Connector PinoutLVDSA2+ Rsvd EF+ BIOSDISABLE#LVDSB2+ GND Fixed LVDSA2EXCD1PERST# SYSRESET#EXCD0PERST# EXCD1CPPE#PCITRDY# PCIRESET#PCISTOP# PciparPEGENABLE# IderesetIDEIOR# IdereqPcie Sdvobred SDVOBRED+SDVOBGRN+ Pcie SdvobgrnTYPE2# TYPE1# TYPE0# TypePin Row C Row D PEGTX12+ PEGRX12+PCIAD16 PEGRX12Signal Description of Boot Strap Signal Boot Strap SignalsAudio Serial Data Out This signal AC ’97/Intel High DefinitionSystem Resources BiosAddress Assignment System Memory Map0CFC 0CFF Address hex Size Available DescriptionPIC Interrupt Request IRQ LinesAvailable Typical Interrupt Source Connected to Pin IRQ15 PCI Configuration Space MapIRQ14 29. PCI Configuration Space Map Azalia PCI Interrupt Routing MapMode Native Bus²C Bus PCI Bus MastersSM Bus Native Root PortSetup Menu and Navigation Entering the Bios Setup ProgramBoot Selection Popup Manufacturer Default SettingsFeature Options Description Main Setup ScreenBios ID ESCAdvanced Setup Acpi Acpi Configuration SubmenuYes PCI Configuration Submenu Win XP Watchdog Acpi Event restart configurationEnabled, 8MB Graphics Configuration SubmenuPCI IRQ Resource Exclusion Submenu PCI Interrupt Routing SubmenuCRT + LFP CRT + SdvoLFP SDVO-B SDVO-C LFP SDVO-C SDVO-BDVI PAL Bios Secam SMPTE240MCRT Lvds NtscCPU Configuration Submenu Bios Setup Description Apic Acpi SCI IRQ Chipset Configuration SubmenuIoapic Interface Configuration Submenu Disabled SIO Winbond W83627 Configuration3F8/IRQ4 2F8/IRQ3IDE Configuration Submenu Clock ConfigurationRAID IDEHost&Device Atapi Cdrom Primary/Secondary IDE Master/Slave SubmenuA.R.T CD/DVDEnabled HiSpeed USB Configuration SubmenuCD-ROM Keyboard/Mouse Configuration SubmenuUSB Mass Storage Device Configuration Submenu Bios Post Remote Access Configuration SubmenuCOM2 AnsiVbat Hardware Monitoring Submenu+5VSB NMI Watchdog Configuration SubmenuBoot Setup PCI RAID Boot Device PriorityUSB Cdrom Boot Settings Configuration Security Setup Hard Disk Security Security SettingsAPM Power SetupHard Disk Security User Password Bios Recovery Additional Bios FeaturesUpdating the Bios Serial Port and Console Redirection Bios Security FeaturesHard Disk Security Features LPC Industry SpecificationsSpecification Link Reference Manual COM Method Contact Information Appendix a Technical SupportAppendix a