Ampro Corporation COM 830 manual Power Supply Implementation Guidelines, Additional Features

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Chapter 2

Specifications

Power Supply Implementation Guidelines

12 volt input power is the sole operational power source for the COM 830. The remaining necessary voltages are internally generated on the module using onboard voltage regulators. A baseboard designer should be aware of the following important information when designing a power supply for a COM 830 application:

It has also been noticed that on some occasions problems occur when using a 12V power supply that produces non monotonic voltage when powered up. The problem is that some internal circuits on the module (e.g. clock-generator chips) will generate their own reset signals when the supply voltage exceeds a certain voltage threshold. A voltage dip after passing this threshold may lead to these circuits becoming confused resulting in a malfunction. It must be mentioned that this problem is quite rare but has been observed in some mobile power supply applications. The best way to ensure that this problem is not encountered is to observe the power supply rise waveform through the use of an oscilloscope to determine if the rise is indeed monotonic and does not have any dips. This should be done during the power supply qualification phase therefore ensuring that the above mentioned problem doesn't arise in the application. For more information about this issue visit www.formfactors.org and view page 25 figure 7 of the document “ATX12V Power Supply Design Guide V2.2”.

Power Management

APM 1.2 compliant. ACPI 2.0 compliant with battery support. Also supports Suspend to RAM (S3).

Secondary Connector Rows C and D

The following subsystems can be found on the secondary connector rows C and D.

PCI Express Graphics (PEG)

The COM 830 supports the implementation of a x16 link for an external high-performance PCI Express Graphics card. It supports a theoretical bandwidth of up to 4GB/s. Each lane of the PEG Port consists of a receive and transmit differential signal pair designated from PEG_RX0 (+ and -) to PEG_RX15 (+ and -) and correspondingly from PEG_TX0 (+ and -) to PEG_RX15 (+ and -). It's also possible to utilize a standardized Advanced Digital Display Card 2nd Generation (ADD2-based on SDVO) via the x16 PEG Port connector, which can support a wide variety of display options like DVI, LVDS, TV-Out and HDMI.

SDVO

The pins of PEG Port are shared with the Serial Digital Video Ouput (SDVO) functionality and may be alternatively used for two third party SDVO compliant devices connected to channels B and C.

PCI Bus

The implementation of the PCI bus complies with PCI specification Rev. 2.3 and provides a 32bit parallel PCI bus that is capable of operating at 33MHz.

IDE

The IDE host adapter is capable of UDMA-100 operation. Only the Primary IDE channel is supported.

Additional Features

Watchdog

The COM 830 is equipped with a multi stage watchdog solution that is triggered by software. The COM Express Specification does not provide support for external hardware triggering of the Watchdog, which means the COM 830 does not support external hardware triggering.

COM 830

Reference Manual

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Contents COM Computer-On-Module Reference Manual Audience Contents Ahci RAID Appendix a Bios Setup DescriptionList of Tables AC97/Intel High Definition Audio Link Signals DescriptionsWarranty SymbolsTerminology Term DescriptionPCI COM Express ConceptTechnical Support Lead-Free Designs RoHS CertificationElectrostatic Sensitive Device COM 830 Options InformationReference Manual COM Feature List Power Mechanical DimensionsUsable Memory Supported Operating SystemsPower Consumption Supply Voltage Standard PowerElectrical Characteristics Electrostatic Sensitive DeviceProcessor Information Environmental Specifications Intel 82945GM Block DiagramHeatspreader Heatspreader Dimensions Primary Connector Rows a and B Connector Subsystems Rows A, B, C, DPCI Express Power ControlExpressCard Graphics Output VGA/CRTAdditional Features Power Supply Implementation GuidelinesOnboard Microcontroller Embedded BiosSimplified Overview of Bios Setup Data Backup Comparison of I/O Apic to 8259 PIC Interrupt mode Security FeaturesSuspend to Ram Ampro Tech NotesIntel Processor Features Native vs. Compatible IDE modeCompatible Mode Native ModeIntel Processor Performance ControlThermal Management Intel Virtualization TechnologyPassive Cooling Active Cooling Acpi Suspend Modes and Resume EventsCritical Trip Point ΔP% = TC1Tn-Tn-1 + TC2Tn-TtGPI2# SMBALERT#WAKE# PME# USB 2.0 Ehci Host Controller Support Routing DiagramDDC PciePDS Connector Signal Descriptions Comment Gigabit Ethernet DescriptionSATA2RX SATA2RX+SATA2TX+ SATA2TXPCIE3TX PCIE3TX+PCIE4RX+ PCIE4RXUSB0 USB0+USB1+ USB1USB7 VgaredVgagrn Commen Tvdacb BiosdisableTvdacc I2CCKCBRESET# SysresetPWRBTN# PwrokSignal Description Comment Pin Row a Row B Connector PinoutLVDSA2+ Rsvd EF+ BIOSDISABLE#LVDSB2+ GND Fixed LVDSA2EXCD1PERST# SYSRESET#EXCD0PERST# EXCD1CPPE#PCITRDY# PCIRESET#PCISTOP# PciparPEGENABLE# IderesetIDEIOR# IdereqPcie Sdvobred SDVOBRED+SDVOBGRN+ Pcie SdvobgrnTYPE2# TYPE1# TYPE0# TypePin Row C Row D PEGTX12+ PEGRX12+PCIAD16 PEGRX12Signal Description of Boot Strap Signal Boot Strap SignalsAudio Serial Data Out This signal AC ’97/Intel High DefinitionSystem Resources BiosAddress Assignment System Memory Map0CFC 0CFF Address hex Size Available DescriptionInterrupt Request IRQ Lines Available Typical Interrupt Source Connected to PinPIC PCI Configuration Space Map IRQ14IRQ15 29. PCI Configuration Space Map Azalia PCI Interrupt Routing MapMode Native Bus²C Bus PCI Bus MastersSM Bus Native Root PortSetup Menu and Navigation Entering the Bios Setup ProgramBoot Selection Popup Manufacturer Default SettingsFeature Options Description Main Setup ScreenBios ID ESCAdvanced Setup Acpi Configuration Submenu YesAcpi PCI Configuration Submenu Win XP Watchdog Acpi Event restart configurationEnabled, 8MB Graphics Configuration SubmenuPCI IRQ Resource Exclusion Submenu PCI Interrupt Routing SubmenuCRT + LFP CRT + SdvoLFP SDVO-B SDVO-C LFP SDVO-C SDVO-BDVI PAL Bios Secam SMPTE240MCRT Lvds NtscCPU Configuration Submenu Bios Setup Description Chipset Configuration Submenu IoapicApic Acpi SCI IRQ Interface Configuration Submenu Disabled SIO Winbond W83627 Configuration3F8/IRQ4 2F8/IRQ3IDE Configuration Submenu Clock ConfigurationRAID IDEHost&Device Atapi Cdrom Primary/Secondary IDE Master/Slave SubmenuA.R.T CD/DVDEnabled HiSpeed USB Configuration SubmenuKeyboard/Mouse Configuration Submenu USB Mass Storage Device Configuration SubmenuCD-ROM Bios Post Remote Access Configuration SubmenuCOM2 AnsiHardware Monitoring Submenu +5VSBVbat NMI Watchdog Configuration SubmenuBoot Setup Boot Device Priority USB CdromPCI RAID Boot Settings Configuration Security Setup Hard Disk Security Security SettingsPower Setup Hard Disk Security User PasswordAPM Additional Bios Features Updating the BiosBios Recovery Bios Security Features Hard Disk Security FeaturesSerial Port and Console Redirection Industry Specifications Specification LinkLPC Reference Manual COM Method Contact Information Appendix a Technical SupportAppendix a