Ampro Corporation COM 830 manual Interrupt Request IRQ Lines, Pic

Page 54

Chapter 3Signals and Pinout Tables

Interrupt Request (IRQ) Lines

Table 3-27. IRQ Lines in PIC mode

IRQ#

Available

Typical Interrupt Source

Connected to Pin

0

No

Counter 0

Not applicable

1

No

Keyboard

Not applicable

2

No

Cascade Interrupt from Slave PIC

Not applicable

3

Yes

 

IRQ3 via SERIRQ or PCI BUS INTx

4

Yes

 

IRQ4 via SERIRQ or PCI BUS INTx

5

Yes

 

IRQ5 via SERIRQ or PCI BUS INTx

6

Yes

 

IRQ6 via SERIRQ or PCI BUS INTx

7

Yes

 

IRQ7 via SERIRQ or PCI BUS INTx

8

No

Real-time Clock

Not applicable

9

Note 2

SCI / Generic

IRQ9 via SERIRQ or PCI BUS INTx

10

Yes

 

IRQ10 via SERIRQ or PCI BUS INTx

11

Yes

 

IRQ11 via SERIRQ or PCI BUS INTx

12

Yes

 

IRQ12 via SERIRQ or PCI BUS INTx

13

No

Math processor

Not applicable

14

Note 1

IDE Controller 0 (IDE0) / Generic

IRQ14 or PCI BUS INTx

15

Note 1

IDE Controller 1 (IDE1) / Generic

IRQ15 or PCI BUS INTx

 

 

 

 

In PIC mode, the PCI bus interrupt lines can be routed to any free IRQ.

NOTE If the ATA/IDE configuration is set to enhanced mode in BIOS setup (serial ATA and parallel ATA native mode operation), IRQ14 and 15 are free for PCI/LPC bus.

In ACPI mode, IRQ9 is used for the SCI (System Control Interrupt). The SCI can be shared with a PCI interrupt line.

Table 3-28. IRQ Lines in APIC mode

IRQ#

Available

Typical Interrupt Source

Connected to Pin / Function

0

No

Counter 0

Not applicable

1

No

Keyboard

Not applicable

2

No

Cascade Interrupt from Slave

Not applicable

 

 

PIC

 

3

Yes

 

IRQ3 via SERIRQ

4

Yes

 

IRQ4 via SERIRQ

5

Yes

 

IRQ5 via SERIRQ

6

Yes

 

IRQ6 via SERIRQ

7

Yes

 

IRQ7 via SERIRQ

8

No

Real-time Clock

Not applicable

 

 

 

 

48

Reference Manual

COM 830

Image 54
Contents COM Computer-On-Module Reference Manual Audience Contents Ahci RAID Bios Setup Description Appendix aAC97/Intel High Definition Audio Link Signals Descriptions List of TablesTerminology SymbolsWarranty Term DescriptionCOM Express Concept PCIElectrostatic Sensitive Device CertificationTechnical Support Lead-Free Designs RoHS COM 830 Options InformationReference Manual COM Feature List Usable Memory Mechanical DimensionsPower Supported Operating SystemsElectrical Characteristics Supply Voltage Standard PowerPower Consumption Electrostatic Sensitive DeviceProcessor Information Environmental Specifications Block Diagram Intel 82945GMHeatspreader Heatspreader Dimensions Connector Subsystems Rows A, B, C, D Primary Connector Rows a and BExpressCard Power ControlPCI Express Graphics Output VGA/CRTPower Supply Implementation Guidelines Additional FeaturesEmbedded Bios Onboard MicrocontrollerSimplified Overview of Bios Setup Data Backup Suspend to Ram Security FeaturesComparison of I/O Apic to 8259 PIC Interrupt mode Ampro Tech NotesCompatible Mode Native vs. Compatible IDE modeIntel Processor Features Native ModeProcessor Performance Control IntelThermal Management Intel Virtualization TechnologyPassive Cooling Critical Trip Point Acpi Suspend Modes and Resume EventsActive Cooling ΔP% = TC1Tn-Tn-1 + TC2Tn-TtGPI2# SMBALERT#WAKE# PME# Routing Diagram USB 2.0 Ehci Host Controller SupportDDC PciePDS Connector Signal Descriptions Gigabit Ethernet Description CommentSATA2TX+ SATA2RX+SATA2RX SATA2TXPCIE4RX+ PCIE3TX+PCIE3TX PCIE4RXUSB1+ USB0+USB0 USB1USB7 VgaredVgagrn Commen Tvdacc BiosdisableTvdacb I2CCKPWRBTN# SysresetCBRESET# PwrokSignal Description Comment Connector Pinout Pin Row a Row BLVDSB2+ GND Fixed Rsvd EF+ BIOSDISABLE#LVDSA2+ LVDSA2EXCD0PERST# SYSRESET#EXCD1PERST# EXCD1CPPE#PCISTOP# PCIRESET#PCITRDY# PciparIDEIOR# IderesetPEGENABLE# IdereqSDVOBGRN+ SDVOBRED+Pcie Sdvobred Pcie SdvobgrnType TYPE2# TYPE1# TYPE0#Pin Row C Row D PCIAD16 PEGRX12+PEGTX12+ PEGRX12Audio Serial Data Out This signal Boot Strap SignalsSignal Description of Boot Strap Signal AC ’97/Intel High DefinitionAddress Assignment BiosSystem Resources System Memory MapAddress hex Size Available Description 0CFC 0CFFInterrupt Request IRQ Lines Available Typical Interrupt Source Connected to PinPIC PCI Configuration Space Map IRQ14IRQ15 29. PCI Configuration Space Map Mode PCI Interrupt Routing MapAzalia Native BusSM Bus PCI Bus Masters²C Bus Native Root PortBoot Selection Popup Entering the Bios Setup ProgramSetup Menu and Navigation Manufacturer Default SettingsBios ID Main Setup ScreenFeature Options Description ESCAdvanced Setup Acpi Configuration Submenu YesAcpi Win XP Watchdog Acpi Event restart configuration PCI Configuration SubmenuPCI IRQ Resource Exclusion Submenu Graphics Configuration SubmenuEnabled, 8MB PCI Interrupt Routing SubmenuLFP SDVO-B SDVO-C CRT + SdvoCRT + LFP LFP SDVO-C SDVO-BCRT Lvds PAL Bios Secam SMPTE240MDVI NtscCPU Configuration Submenu Bios Setup Description Chipset Configuration Submenu IoapicApic Acpi SCI IRQ Interface Configuration Submenu 3F8/IRQ4 SIO Winbond W83627 ConfigurationDisabled 2F8/IRQ3RAID Clock ConfigurationIDE Configuration Submenu IDEHost&Device A.R.T Primary/Secondary IDE Master/Slave SubmenuAtapi Cdrom CD/DVDEnabled USB Configuration Submenu HiSpeedKeyboard/Mouse Configuration Submenu USB Mass Storage Device Configuration SubmenuCD-ROM COM2 Remote Access Configuration SubmenuBios Post AnsiHardware Monitoring Submenu +5VSBVbat Watchdog Configuration Submenu NMIBoot Setup Boot Device Priority USB CdromPCI RAID Boot Settings Configuration Security Setup Security Settings Hard Disk SecurityPower Setup Hard Disk Security User PasswordAPM Additional Bios Features Updating the BiosBios Recovery Bios Security Features Hard Disk Security FeaturesSerial Port and Console Redirection Industry Specifications Specification LinkLPC Reference Manual COM Appendix a Technical Support Method Contact InformationAppendix a