Ampro Corporation COM 830 manual PCI Interrupt Routing Map, Azalia, Mode, Native Bus, Line ¹

Chapter 3

Signals and Pinout Tables

Table 3-29. PCI Configuration Space Map (Continued)

04h (see

00h

xxh

Internal

PCI Express Port 3

Note)

05h (see

00h

Xxh

Internal

PCI Express Port 4

Note)

06h (see

00h

00h

Internal

Onboard Gigabit LAN

Note)

Controller

07h (see

04h

xxh

INTA-INTD

PCI Bus Slot 1

Note)

07h (see

05h

xxh

INTA-INTD

PCI Bus Slot 2

Note)

07h (see

06h

xxh

INTA-INTD

PCI Bus Slot 3

Note)

07h (see

07h

xxh

INTA-INTD

PCI Bus Slot 4

Note)

NOTE The given bus numbers only apply if all PCI Express Ports are enabled in the BIOS

setup. If for example PCI Express Port 2 is disabled then PCI Express Port 3 will be

assigned bus number 3 instead of bus number 4, Port 4 will be assigned bus number 4

and the standard PCI slots will be assigned bus number 6. Furthermore, the

respective PCI Express Root Port is hidden if the corresponding PCI Express Port is

disabled.

PCI Interrupt Routing Map

Table 3-30. PCI Interrupt Routing Map

PIRQ

PCI

APIC

VGA

Azalia

UHC

UCH

UCH

UHCI

EH

PATA

SM

A

BUS

Mode

HDA

I 0

I 1

I 2

3

CI

Native

Bus

C

INT

IRQ

9

Line ¹

7

A

16

x

x

x

B

17

x

C

18

x

x

D

19

x

x

E

INTD

20

F

INTA

21

G

INTB

22

H

INTC

23

x

x

COM 830 Reference Manual 51