
Chapter 3 |
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| Signals and Pinout Tables | ||||||
Table |
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| PCIE3_TX+ |
| PCI Express channel 4, Transmit Output |
| O |
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| Supports PCI |
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| PCIE3_TX- |
| differential pair |
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| PCIE |
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| Express Base |
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| Specification, |
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| PCIE4_RX+ |
| PCI Express channel 5, Receive Input |
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| Supports PCI |
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| PCIE4_RX- |
| differential pair |
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| PCIE |
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| Express Base |
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| Revision 1.0a |
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| PCIE4_TX+ |
| PCI Express channel 5, Transmit Output |
| O |
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| Supports PCI |
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| PCIE4_TX- |
| differential pair |
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| PCIE |
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| Express Base |
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| PCIE5_RX+ |
| PCI Express channel 6, Receive Input |
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| Not available. |
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| PCIE5_RX- |
| differential pair |
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| PCIE |
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| Used by |
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| onboard Gigabit |
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| Ethernet. |
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| PCIE5_TX+ |
| PCI Express channel 6, Transmit Output |
| O |
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| Not available. |
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| PCIE5_TX- |
| differential pair |
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| PCIE |
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| onboard Gigabit |
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| Ethernet. |
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| PCIE_CLK_RE |
| PCI Express Reference Clock output for all |
| O |
| PD 49.9R |
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| F+ |
| PCI Express and PCI Express Graphics |
| PCIE |
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| PCIE_CLK_RE | Lanes |
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| F- |
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Table |
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| Signal |
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| Description |
| I/O |
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| PU/PD |
| Comment |
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| EXCD[0..1]_CPPE | ExpressCard capable card |
| I |
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| PU 8k2 |
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| request |
| 3.3VSB |
| 3.3VSB |
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| EXCD[0..1]_RST# | ExpressCard Reset |
| O 3.3V |
| PU 10k |
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| (EXCD[0..1]_PER |
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| 3.3V |
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| ST#) |
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Table |
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| Signal |
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| Description |
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| I/O |
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| PU/PD |
| Comment |
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| LPC_AD[0:3] |
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| LPC multiplexed address, command and |
| I/O 3.3V |
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| data bus |
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| LPC_FRAME# |
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| LPC frame indicates the start of an LPC |
| O 3.3V |
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| cycle |
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| LPC_DRQ[0:1]# |
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| LPC serial DMA request |
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| I 3.3V | PU 10k |
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| 3.3V |
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| LPC_SERIRQ |
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| LPC serial interrupt |
| I/O 3.3V | PU 10k |
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| 3.3V |
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| LPC_CLK |
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| LPC clock output - 33MHz nominal |
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| O 3.3V |
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COM 830 | Reference Manual | 29 |