Ampro Corporation COM 830 PCIE3TX+, PCIE4RX+, PCIE4TX+, PCIE5RX+, PCIE5TX+, Pcieclkre, Lpcframe#

Chapter 3

Signals and Pinout Tables

Table 3-5. PCI Express Signal Descriptions [general purpose] (Continued)

PCIE3_TX+

PCI Express channel 4, Transmit Output

O

Supports PCI

PCIE3_TX-

differential pair

PCIE

Express Base

Specification,

Revision 1.0a

PCIE4_RX+

PCI Express channel 5, Receive Input

I

Supports PCI

PCIE4_RX-

differential pair

PCIE

Express Base

Specification,

Revision 1.0a

PCIE4_TX+

PCI Express channel 5, Transmit Output

O

Supports PCI

PCIE4_TX-

differential pair

PCIE

Express Base

Specification,

Revision 1.0a

PCIE5_RX+

PCI Express channel 6, Receive Input

I

Not available.

PCIE5_RX-

differential pair

PCIE

Used by

onboard Gigabit

Ethernet.

PCIE5_TX+

PCI Express channel 6, Transmit Output

O

Not available.

PCIE5_TX-

differential pair

PCIE

Used by

onboard Gigabit

Ethernet.

PCIE_CLK_RE

PCI Express Reference Clock output for all

O

PD 49.9R

F+

PCI Express and PCI Express Graphics

PCIE

PCIE_CLK_RE

Lanes

F-

Table 3-6. ExpressCard Support Pins Descriptions

Signal

Description

I/O

PU/PD

Comment

EXCD[0..1]_CPPE

ExpressCard capable card

I

PU 8k2

#

request

3.3VSB

3.3VSB

EXCD[0..1]_RST#

ExpressCard Reset

O 3.3V

PU 10k

(EXCD[0..1]_PER

3.3V

ST#)

Table 3-7. LPC Signal Descriptions

Signal

Description

I/O

PU/PD

Comment

LPC_AD[0:3]

LPC multiplexed address, command and

I/O 3.3V

data bus

LPC_FRAME#

LPC frame indicates the start of an LPC

O 3.3V

cycle

LPC_DRQ[0:1]#

LPC serial DMA request

I 3.3V

PU 10k

3.3V

LPC_SERIRQ

LPC serial interrupt

I/O 3.3V

PU 10k

3.3V

LPC_CLK

LPC clock output - 33MHz nominal

O 3.3V

COM 830 Reference Manual 29