
Chapter 3 |
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| Signals and Pinout Tables | ||
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| VGA_BLU | Blue for monitor. Analog DAC output, | O | PD 150R | Analog output |
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| designed to drive a | Analog |
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| VGA_HSYN | Horizontal sync output to VGA monitor | O 3.3V |
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| C |
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| VGA_VSYN | Vertical sync output to VGA monitor | O 3.3V |
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| C |
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| VGA_I2C_C | DDC clock line (I²C port dedicated to identify | I/O 5V | PU 2k2 |
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| K | VGA monitor capabilities) |
| 5V |
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| VGA_I2C_D | DDC data line. | I/O 5V | PU 2k2 |
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| 5V |
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Table
Signal | Description | I/O | PU/PD | Comment |
LVDS_A[0:3]+ | LVDS Channel A differential pairs | O |
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LVDS_A[0:3]- |
| LVDS |
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LVDS_A_CK+ | LVDS Channel A differential clock | O |
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LVDS_A_CK- |
| LVDS |
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LVDS_B[0:3]+ | LVDS Channel B differential pairs | O |
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LVDS_B[0:3]- |
| LVDS |
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LVDS_B_CK+ | LVDS Channel B differential clock | O |
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LVDS_B_CK- |
| LVDS |
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LVDS_VDD_EN | LVDS panel power enable | O 3.3V | PD 10k |
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LVDS_BKLT_E | LVDS panel backlight enable | O 3.3V |
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N |
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LVDS_BKLT_C | LVDS panel backlight brightness | O 3.3V |
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TRL | control |
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LVDS_I2C_CK | DDC lines used for flat panel detection | O 3.3V | PU 2k2 |
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| and control. |
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LVDS_I2C_DAT | DDC lines used for flat panel detection | I/O | PU 2k2 |
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| and control. | 3.3V | 3.3V |
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Table
Signal | Description | I/O | PU/PD | Commen |
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TV_DAC_A | TVDAC Channel A Output supports the | O | PD 150R | Analog |
| following: Composite video: CVBS | Analog |
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| Component video: Chrominance (Pb) analog |
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32 | Reference Manual | COM 830 |