Ampro Corporation COM 830 manual Commen

Page 38

Chapter 3

 

 

Signals and Pinout Tables

Table 3-9. CRT Signal Descriptions (Continued)

 

 

 

 

 

 

 

 

 

 

VGA_BLU

Blue for monitor. Analog DAC output,

O

PD 150R

Analog output

 

 

designed to drive a 37.5-Ohm equivalent load.

Analog

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VGA_HSYN

Horizontal sync output to VGA monitor

O 3.3V

 

 

 

C

 

 

 

 

 

VGA_VSYN

Vertical sync output to VGA monitor

O 3.3V

 

 

 

C

 

 

 

 

 

VGA_I2C_C

DDC clock line (I²C port dedicated to identify

I/O 5V

PU 2k2

 

 

K

VGA monitor capabilities)

 

5V

 

 

VGA_I2C_D

DDC data line.

I/O 5V

PU 2k2

 

 

AT

 

 

5V

 

 

 

 

 

 

 

Table 3-10. LVDS Signal Descriptions

Signal

Description

I/O

PU/PD

Comment

LVDS_A[0:3]+

LVDS Channel A differential pairs

O

 

 

LVDS_A[0:3]-

 

LVDS

 

 

LVDS_A_CK+

LVDS Channel A differential clock

O

 

 

LVDS_A_CK-

 

LVDS

 

 

LVDS_B[0:3]+

LVDS Channel B differential pairs

O

 

 

LVDS_B[0:3]-

 

LVDS

 

 

LVDS_B_CK+

LVDS Channel B differential clock

O

 

 

LVDS_B_CK-

 

LVDS

 

 

LVDS_VDD_EN

LVDS panel power enable

O 3.3V

PD 10k

 

LVDS_BKLT_E

LVDS panel backlight enable

O 3.3V

 

 

N

 

 

 

 

LVDS_BKLT_C

LVDS panel backlight brightness

O 3.3V

 

 

TRL

control

 

 

 

LVDS_I2C_CK

DDC lines used for flat panel detection

O 3.3V

PU 2k2

 

 

and control.

 

3.3V

 

LVDS_I2C_DAT

DDC lines used for flat panel detection

I/O

PU 2k2

 

 

and control.

3.3V

3.3V

 

 

 

 

 

 

Table 3-11. TV-Out Signal Descriptions

Signal

Description

I/O

PU/PD

Commen

 

 

 

 

t

TV_DAC_A

TVDAC Channel A Output supports the

O

PD 150R

Analog

 

following: Composite video: CVBS

Analog

 

output

 

Component video: Chrominance (Pb) analog

 

 

 

 

 

 

 

signal

 

 

 

 

S-Video: not used

 

 

 

 

 

 

 

 

32

Reference Manual

COM 830

Image 38
Contents COM Computer-On-Module Reference Manual Audience Contents Ahci RAID Bios Setup Description Appendix aAC97/Intel High Definition Audio Link Signals Descriptions List of TablesTerminology SymbolsWarranty Term DescriptionCOM Express Concept PCIElectrostatic Sensitive Device CertificationTechnical Support Lead-Free Designs RoHS COM 830 Options InformationReference Manual COM Feature List Usable Memory Mechanical DimensionsPower Supported Operating SystemsElectrical Characteristics Supply Voltage Standard PowerPower Consumption Electrostatic Sensitive DeviceProcessor Information Environmental Specifications Block Diagram Intel 82945GMHeatspreader Heatspreader Dimensions Connector Subsystems Rows A, B, C, D Primary Connector Rows a and BExpressCard Power ControlPCI Express Graphics Output VGA/CRTPower Supply Implementation Guidelines Additional FeaturesEmbedded Bios Onboard MicrocontrollerSimplified Overview of Bios Setup Data Backup Suspend to Ram Security FeaturesComparison of I/O Apic to 8259 PIC Interrupt mode Ampro Tech NotesCompatible Mode Native vs. Compatible IDE modeIntel Processor Features Native ModeProcessor Performance Control IntelPassive Cooling Thermal ManagementIntel Virtualization Technology Critical Trip Point Acpi Suspend Modes and Resume EventsActive Cooling ΔP% = TC1Tn-Tn-1 + TC2Tn-TtWAKE# PME# GPI2#SMBALERT# Routing Diagram USB 2.0 Ehci Host Controller SupportPDS DDCPcie Connector Signal Descriptions Gigabit Ethernet Description CommentSATA2TX+ SATA2RX+SATA2RX SATA2TX PCIE4RX+ PCIE3TX+ PCIE3TX PCIE4RXUSB1+ USB0+USB0 USB1Vgagrn USB7Vgared Commen Tvdacc BiosdisableTvdacb I2CCKPWRBTN# SysresetCBRESET# PwrokSignal Description Comment Connector Pinout Pin Row a Row BLVDSB2+ GND Fixed Rsvd EF+ BIOSDISABLE#LVDSA2+ LVDSA2EXCD0PERST# SYSRESET#EXCD1PERST# EXCD1CPPE#PCISTOP# PCIRESET#PCITRDY# PciparIDEIOR# IderesetPEGENABLE# IdereqSDVOBGRN+ SDVOBRED+Pcie Sdvobred Pcie SdvobgrnType TYPE2# TYPE1# TYPE0#Pin Row C Row D PCIAD16 PEGRX12+PEGTX12+ PEGRX12Audio Serial Data Out This signal Boot Strap SignalsSignal Description of Boot Strap Signal AC ’97/Intel High DefinitionAddress Assignment BiosSystem Resources System Memory MapAddress hex Size Available Description 0CFC 0CFFPIC Interrupt Request IRQ LinesAvailable Typical Interrupt Source Connected to Pin IRQ15 PCI Configuration Space MapIRQ14 29. PCI Configuration Space Map Mode PCI Interrupt Routing MapAzalia Native BusSM Bus PCI Bus Masters²C Bus Native Root PortBoot Selection Popup Entering the Bios Setup ProgramSetup Menu and Navigation Manufacturer Default SettingsBios ID Main Setup ScreenFeature Options Description ESCAdvanced Setup Acpi Acpi Configuration SubmenuYes Win XP Watchdog Acpi Event restart configuration PCI Configuration SubmenuPCI IRQ Resource Exclusion Submenu Graphics Configuration SubmenuEnabled, 8MB PCI Interrupt Routing SubmenuLFP SDVO-B SDVO-C CRT + SdvoCRT + LFP LFP SDVO-C SDVO-BCRT Lvds PAL Bios Secam SMPTE240MDVI NtscCPU Configuration Submenu Bios Setup Description Apic Acpi SCI IRQ Chipset Configuration SubmenuIoapic Interface Configuration Submenu 3F8/IRQ4 SIO Winbond W83627 ConfigurationDisabled 2F8/IRQ3RAID Clock ConfigurationIDE Configuration Submenu IDEHost&Device A.R.T Primary/Secondary IDE Master/Slave SubmenuAtapi Cdrom CD/DVDEnabled USB Configuration Submenu HiSpeedCD-ROM Keyboard/Mouse Configuration SubmenuUSB Mass Storage Device Configuration Submenu COM2 Remote Access Configuration SubmenuBios Post AnsiVbat Hardware Monitoring Submenu+5VSB Watchdog Configuration Submenu NMIBoot Setup PCI RAID Boot Device PriorityUSB Cdrom Boot Settings Configuration Security Setup Security Settings Hard Disk SecurityAPM Power SetupHard Disk Security User Password Bios Recovery Additional Bios FeaturesUpdating the Bios Serial Port and Console Redirection Bios Security FeaturesHard Disk Security Features LPC Industry SpecificationsSpecification Link Reference Manual COM Appendix a Technical Support Method Contact InformationAppendix a