Ampro Corporation COM 830 manual System Resources, Address Assignment, System Memory Map, Bios

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Chapter 3

Signals and Pinout Tables

CAUTION The signals listed in the table above are used as chipset configuration straps during system reset. In this condition (during reset), they are inputs that are pulled to the correct state by either COM Express internally implemented resistors or chipset internally implemented resistors that are located on the module. No external DC loads or external pull-up or pull-down resistors should change the configuration of the signals listed in the above table with the exception of AC_SYNC and AC_SDOUT. External resistors may override the internal strap states and cause the COM Express module to malfunction and/or cause irreparable damage to the module.

AC_SYNC and AC_SDOUT can be used to switch PCI Express channels 1-4 between x1 and x4 mode. If both signals are each pulled-up (using 1K resistors) to 3.3V at the rising edge of PWROK then x4 mode is enabled. x1 mode is used by default if these resistors are not populated.

System Resources

System Memory Map

Table 3-25. Memory Map

Address Range (decimal)

Address Range (hex)

Size

Description

(TOM-192kB) – TOM

N.A.

192kB

ACPI reclaim, MPS

 

 

 

and NVS area **

(TOM-8MB-192kB) – (TOM-

N.A.

1 or 8MB

VGA frame buffer *

192kB)

 

 

 

1024kB – (TOM-8MB-192kB)

100000 – N.A

N.A.

Extended memory

869kB – 1024kB

E0000 - FFFFF

128kB

Runtime BIOS

832kB – 869kB

D0000 - DFFFF

64kB

Upper memory

640kB – 832kB

A0000 - CFFFF

192kB

Video memory and

 

 

 

BIOS

639kB – 640kB

9FC00 - 9FFFF

1kB

Extended BIOS data

0 – 639kB

00000 - 9FC00

512kB

Conventional memory

 

 

 

 

NOTE T.O.M. = Top of memory = max. DRAM installed

*VGA frame buffer can be reduced to 1MB in setup. ** Only if ACPI Aware OS is set to YES in setup

I/O Address Assignment

The I/O address assignment of the COM 830 module is functionally identical with a standard PC/AT. The most important addresses and the ones that differ from the standard PC/AT configuration are listed in the table below.

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Reference Manual

COM 830

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Contents COM Computer-On-Module Reference Manual Audience Contents Ahci RAID Bios Setup Description Appendix aAC97/Intel High Definition Audio Link Signals Descriptions List of TablesSymbols WarrantyTerminology Term DescriptionCOM Express Concept PCICertification Technical Support Lead-Free Designs RoHSElectrostatic Sensitive Device COM 830 Options InformationReference Manual COM Feature List Mechanical Dimensions PowerUsable Memory Supported Operating SystemsSupply Voltage Standard Power Power ConsumptionElectrical Characteristics Electrostatic Sensitive DeviceProcessor Information Environmental Specifications Block Diagram Intel 82945GMHeatspreader Heatspreader Dimensions Connector Subsystems Rows A, B, C, D Primary Connector Rows a and BPower Control PCI ExpressExpressCard Graphics Output VGA/CRTPower Supply Implementation Guidelines Additional FeaturesEmbedded Bios Onboard MicrocontrollerSimplified Overview of Bios Setup Data Backup Security Features Comparison of I/O Apic to 8259 PIC Interrupt modeSuspend to Ram Ampro Tech NotesNative vs. Compatible IDE mode Intel Processor FeaturesCompatible Mode Native ModeProcessor Performance Control IntelIntel Virtualization Technology Thermal ManagementPassive Cooling Acpi Suspend Modes and Resume Events Active CoolingCritical Trip Point ΔP% = TC1Tn-Tn-1 + TC2Tn-TtSMBALERT# GPI2#WAKE# PME# Routing Diagram USB 2.0 Ehci Host Controller SupportPcie DDCPDS Connector Signal Descriptions Gigabit Ethernet Description CommentSATA2RX+ SATA2RXSATA2TX+ SATA2TXPCIE3TX+ PCIE3TXPCIE4RX+ PCIE4RXUSB0+ USB0USB1+ USB1Vgared USB7Vgagrn Commen Biosdisable TvdacbTvdacc I2CCKSysreset CBRESET#PWRBTN# PwrokSignal Description Comment Connector Pinout Pin Row a Row BRsvd EF+ BIOSDISABLE# LVDSA2+LVDSB2+ GND Fixed LVDSA2SYSRESET# EXCD1PERST#EXCD0PERST# EXCD1CPPE#PCIRESET# PCITRDY#PCISTOP# PciparIdereset PEGENABLE#IDEIOR# IdereqSDVOBRED+ Pcie SdvobredSDVOBGRN+ Pcie SdvobgrnType TYPE2# TYPE1# TYPE0# Pin Row C Row D PEGRX12+ PEGTX12+PCIAD16 PEGRX12Boot Strap Signals Signal Description of Boot Strap SignalAudio Serial Data Out This signal AC ’97/Intel High DefinitionBios System ResourcesAddress Assignment System Memory MapAddress hex Size Available Description 0CFC 0CFFAvailable Typical Interrupt Source Connected to Pin Interrupt Request IRQ LinesPIC IRQ14 PCI Configuration Space MapIRQ15 29. PCI Configuration Space Map PCI Interrupt Routing Map AzaliaMode Native BusPCI Bus Masters ²C BusSM Bus Native Root PortEntering the Bios Setup Program Setup Menu and NavigationBoot Selection Popup Manufacturer Default SettingsMain Setup Screen Feature Options DescriptionBios ID ESCAdvanced Setup Yes Acpi Configuration SubmenuAcpi Win XP Watchdog Acpi Event restart configuration PCI Configuration SubmenuGraphics Configuration Submenu Enabled, 8MBPCI IRQ Resource Exclusion Submenu PCI Interrupt Routing SubmenuCRT + Sdvo CRT + LFPLFP SDVO-B SDVO-C LFP SDVO-C SDVO-BPAL Bios Secam SMPTE240M DVICRT Lvds NtscCPU Configuration Submenu Bios Setup Description Ioapic Chipset Configuration SubmenuApic Acpi SCI IRQ Interface Configuration Submenu SIO Winbond W83627 Configuration Disabled3F8/IRQ4 2F8/IRQ3Clock Configuration IDE Configuration SubmenuRAID IDEHost&Device Primary/Secondary IDE Master/Slave Submenu Atapi CdromA.R.T CD/DVDEnabled USB Configuration Submenu HiSpeedUSB Mass Storage Device Configuration Submenu Keyboard/Mouse Configuration SubmenuCD-ROM Remote Access Configuration Submenu Bios PostCOM2 Ansi+5VSB Hardware Monitoring SubmenuVbat Watchdog Configuration Submenu NMIBoot Setup USB Cdrom Boot Device PriorityPCI RAID Boot Settings Configuration Security Setup Security Settings Hard Disk SecurityHard Disk Security User Password Power SetupAPM Updating the Bios Additional Bios FeaturesBios Recovery Hard Disk Security Features Bios Security FeaturesSerial Port and Console Redirection Specification Link Industry SpecificationsLPC Reference Manual COM Appendix a Technical Support Method Contact InformationAppendix a