Texas Instruments TMS320DM646X DMSOC manual List of Tables

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	List of Tables
1	EMIF Pins	10
2	Behavior of EM_CS Signal Between Normal Mode and Select Strobe Mode	10
3	Description of the Asynchronous Configuration Register (ACFGn)	12
4	Description of the Asynchronous Wait Cycle Configuration Register (AWCCR)	13
5	Description of the EMIF Interrupt Mask Set Register (EIMSR)	13
6	Description of the EMIF Interrupt Mast Clear Register (EIMCR)	13
7	Asynchronous Read Operation in Normal Mode	14
8	Asynchronous Write Operation in Normal Mode	16
9	Asynchronous Read Operation in Select Strobe Mode	18
10	Asynchronous Write Operation in Select Strobe Mode	20
11	Description of the NAND Flash Control Register (NANDFCR)	22
12	Configuration For NAND Flash	22
13	EMIF Interrupt	28
14	Interrupt Monitor and Control Bit Fields	28
15	EMIF Input Timing Requirements	31
16	ASRAM Output Timing Characteristics	31
17	ASRAM Input Timing Requirement for a Read	31
18	ASRAM Input Timing Requirements for a Write	32
19	ASRAM Timing Requirements With PCB Delays	34
20	EMIF Timing Requirements for TC5516100FT-12 Example	37
21	ASRAM Timing Requirements for TC5516100FT-12 Example	37
22	Measured PCB Delays for TC5516100FT-12 Example	37
23	Configuring A2CR for TC5516100FT-12 Example	39
24	Recommended Margins	39
25	EMIF Read Timing Requirements	40
26	NAND Flash Read Timing Requirements	40
27	NAND Flash Write Timing Requirements	42
28	EMIF Timing Requirements for HY27UA081G1M Example	45
29	NAND Flash Timing Requirements for HY27UA081G1M Example	45
30	Configuring A1CR for HY27UA081G1M Example	47
31	Configuring NANDFCR for HY27UA081G1M Example	47
32	External Memory Interface (EMIF) Registers	48
33	Revision Code and Status Register (RCSR) Field Descriptions	49
34	Asynchronous Wait Cycle Configuration Register (AWCCR) Field Descriptions	50
35	Asynchronous n Configuration Register (ACFGn) Field Descriptions	52
36	EMIF Interrupt Raw Register (EIRR) Field Descriptions	53
37	EMIF Interrupt Mask Register (EIMR) Field Descriptions	54
38	EMIF Interrupt Mask Set Register (EIMSR) Field Descriptions	56
39	EMIF Interrupt Mask Clear Register (EIMCR) Field Descriptions	58
40	NAND Flash Control Register (NANDFCR) Field Descriptions	60
41	NAND Flash Status Register (NANDFSR) Field Descriptions	61
42	NAND Flash n ECC Register (NANDECCn) Field Descriptions	62
43	Document Revision History	63

SPRUEQ7C –February 2010	List of Tables	5
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Contents Users Guide Submit Documentation Feedback Appendix a Revision HistoryList of Figures List of Tables Read This First Related Documentation From Texas Instruments Purpose of the Peripheral FeaturesEmif Requests Functional Block DiagramClock Control Emif Pins Signal DescriptionsPin Multiplexing Asynchronous Controller and InterfaceEmif Asynchronous Interface Interfacing to Asynchronous MemoryProgrammable Asynchronous Parameters Configuring the Emif for Asynchronous AccessesDescription of the Emif Interrupt Mast Clear Register Eimcr Description of the Emif Interrupt Mask Set Register EimsrAsynchronous Read Operations Normal Mode Read and Write Operations in Normal ModeAsynchronous Read Operation in Normal Mode Time Interval Pin Activity in WE Strobe ModeTiming Waveform of an Asynchronous Read Cycle in Normal Mode Asynchronous Write Operation in Normal Mode Asynchronous Write Operations Normal ModeAddress Asynchronous Read Operations Select Strobe Mode Read and Write Operations in Select Strobe ModeAsynchronous Read Operation in Select Strobe Mode Time Interval Pin Activity in Select Strobe ModeEMD Data Asynchronous Write Operation in Select Strobe Mode Asynchronous Write Operations Select Strobe ModeEMD Configuring for Nand Flash Mode Nand Flash ModeConfiguration For Nand Flash Description of the Nand Flash Control Register NandfcrDriving CLE and ALE Connecting to Nand FlashNand Data Read and Write via DMA Nand Read and Program OperationsECC Value for 8-Bit Nand Flash ECC GenerationInterfacing to a TI DSP HPI Nand Flash Status Register NandfsrInterfacing to a Non-CE Dont Care Nand Flash Data Bus Parking Extended Wait Mode and the Emwait PinReset and Initialization Considerations Emif Interrupt Interrupt SupportInterrupt Events Interrupt Monitor and Control Bit FieldsInterrupt Multiplexing Power ManagementProgram Execution Emulation ConsiderationsInterfacing to Asynchronous Sram Asram Connecting to AsramMeeting AC Timing Requirements for Asram Asram Output Timing CharacteristicsEmif Input Timing Requirements Asram Input Timing Requirement for a ReadAsram Input Timing Requirements for a Write Timing Waveform of an Asram ReadTiming Waveform of an Asram Write Asram Timing Requirements With PCB Delays Taking Into Account PCB DelaysParameter Description Read Access Write AccessTiming Waveform of an Asram Read with PCB Delays Timing Waveform of an Asram Write with PCB Delays Measured PCB Delays for TC5516100FT-12 Example Example Using TC5516100FT-12Emif Timing Requirements for TC5516100FT-12 Example Asram Timing Requirements for TC5516100FT-12 Example27 12 5 Rsetup Rstrobe w Interfacing to Nand Flash Configuring A2CR for TC5516100FT-12 ExampleMargin Requirements Recommended MarginsNand Flash Read Timing Requirements Meeting AC Timing Requirements for Nand FlashEmif Read Timing Requirements Timing Waveform of a Nand Flash Read Nand Flash Write Timing Requirements Timing Waveform of a Nand Flash Command Write Timing Waveform of a Nand Flash Data Write Nand Flash Timing Requirements for HY27UA081G1M Example Example Using Hynix HY27UA081G1MEmif Timing Requirements for HY27UA081G1M Example Rstrobe w max 1 w Configuring Nandfcr for HY27UA081G1M Example Configuring A1CR for HY27UA081G1M ExampleParameter Setting Nand Flash mode for chip selectOffset Acronym Register Description External Memory Interface Emif RegistersBit Field Value Description Revision Code and Status Register RcsrRevision Code and Status Register Rcsr Field Descriptions WP3 WP2 WP1 WP0 Asynchronous Wait Cycle Configuration Register AwccrCS5WAIT CS4WAIT CS3WAIT CS2WAIT WP3EMWAIT2 pin is used Asynchronous n Configuration Registers A1CR-A4CR Emif Interrupt Raw Register Eirr Field Descriptions Emif Interrupt Raw Register EirrWR3 WR2 WR1 WR0 WR3Emif Interrupt Mask Register Eimr Field Descriptions Emif Interrupt Mask Register EimrWRM3 WRM2 WRM1 WRM0 WRM3AT bit in the Emif interrupt raw register Eirr Emif Interrupt Mask Set Register Eimsr Field Descriptions Emif Interrupt Mask Set Register EimsrWRMSET3 WRMSET2 WRMSET1 WRMSET0 WRMSET3Bit in Eimcr Emif Interrupt Mask Clear Register Eimcr Field Descriptions Emif Interrupt Mask Clear Register EimcrWRMCLR3 WRMCLR2 WRMCLR1 WRMCLR0 WRMCLR3Written to the Atmset bit in Eimsr Nand Flash Control Register Nandfcr Field Descriptions Nand Flash Control Register NandfcrNand Flash n ECC Registers NANDF1ECC-NANDF4ECC Nand Flash Status Register NandfsrNand Flash Status Register Nandfsr Field Descriptions WaitstP8O P4O P2O P1O Nand Flash n ECC Register NANDECCn Field DescriptionsP8E P4E P2E P1E P8OAdditions/Modifications/Deletions Document Revision HistoryRfid Products ApplicationsDSP