
SPI Pins and Connections
PC Parallel/SPI Port
| 2 3 4 | 
 | |
| 15 | 19 | |
| 
 | MASTER OUT/SLAVE IN | |
| 
 | SPI CLOCK | |
| 
 | COMM GND | |
| 
 | For Use ONLY | |
| 
 | with IMS Parameter | |
| 
 | Setup Cable | |
| CHIP SELECT | +5 VDC OUT | |
| MASTER IN/SLAVE OUT | ||
| 
 | ||
| 
 | P1: I/O | 
Figure 2.2.2: SPI Pins and Connections, 10-Pin  IDC
SPI Master with Multiple MDriveAC Plus Microstepping
It is possible to link multiple MDriveAC Plus Microstepping units in an array from a single SPI Master by wiring the system and programming the user interface to write to multiple chip selects.
Each MDriveAC Plus on the bus will have a dedicated chip select. Only one system MDriveAC Plus can be communicated with/ Parameters changed at a time.
SPI Clock
SPI Master MOSIMISO
CS
MDriveACPlus Microstepping
Figure 2.2.4: SPI Master with a Single MDriveAC Plus Microstepping
SPI Clock
MOSI
SPI Master MISO
CS1
CS2
 MDriveACPlus
 MDriveACPlus
Microstepping
#1
MDriveACPlus
Microstepping
#2
| Figure 2.2.5: SPI Master with Multiple MDriveAC Plus Microsteppings | 
 | 
| Part 2: Interfacing and Configuring |