Texas Instruments 3138 155 232931 manual Configuration Overview, Phase

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CC2420

TC

I-phase	1	0	1	0	1	0		0	1	0	0	0	1	0	1		1	1
Q-phase	1	1	0	1		1	0	0	1	1	1	0	0		0	0	1	0

2TC

Figure 7. I / Q Phases when transmitting a zero-symbol chip sequence, TC = 0.5 µs

11 Configuration Overview

CC2420 can be configured to achieve the

best performance for different applications. Through the programmable configuration registers the following key parameters can be programmed:

•Receive / transmit mode

•RF channel selection

•RF output power

•Power-down / power-up mode

•Crystal oscillator power-up / power down

•Clear Channel Assessment mode

•Packet handling hardware support

•Encryption / Authentication modes

SWRS041B

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Contents Applications Key FeaturesProduct Description Table of contents RF Data Buffering Ordering Information General Information ITU-T AbbreviationsReferences Features Operating Conditions Absolute Maximum RatingsParameter Min Max Units Condition Parameter Min Typ Max Units ConditionOverall Electrical SpecificationsTransmit Section Parameter Min Typ Max Unit Condition / NoteReceive Section If Section Rssi / Carrier SenseFrequency Synthesizer Section VDD Digital Inputs/OutputsPower Supply Battery MonitorVoltage Regulator CC2420 Pin Pin Name Pin type Pin Description Pin AssignmentAvddadc Circuit Description CC2420 simplified block diagramCC2420 Application Circuit Power supply decoupling and filteringInput / output matching Bias resistorDescription Overview of external componentsTransceiver Transceiver Bill of materials for the application circuits Ieee 802.15.4 Modulation Format Symbol Chip sequence C0, C1, C2, … , C31Phase Configuration OverviewSmartRF Studio user interface Evaluation SoftwarePin configuration 13 4-wire Serial Configuration and Data InterfaceRegister access Parameter Symbol Min Max Units Conditions SPI timing specification Status byteRAM access Configuration registers write and read operations via SPI Multiple SPI access CC2420 RAM Memory Space Fifo accessAddress Byte Ordering Name Description Microcontroller Interface and Pin Description Configuration interfaceRxfifo overflow Receive modePin activity examples during receive Demodulator, Symbol Synchroniser and Data Decision Frame Format Demodulator Simplified Block DiagramMAC protocol data unit Transmitted Synchronisation Header Length fieldFormat of the Frame Control Field FCF Frame check sequence Buffered receive mode Buffered transmit modeRF Data Buffering Fifop Unbuffered, serial modeAcknowledge Frames Address RecognitionAcknowledge frame format Radio control state machine Radio control states Keys MAC Security Operations Encryption and AuthenticationNonce / counter Ieee 802.15.4 NonceIn-line security operations CC2420 Security Flag Byte Stand-alone encryptionCBC-MAC CTR mode encryption / decryption21.7 CCM Mode LMIC Time Linear if and AGC SettingsRssi / Energy Detection TimingValue Link Quality IndicationRF Level dBm Frequency and Channel Programming Clear Channel AssessmentVCO and PLL Self-Calibration Output Power ProgrammingVoltage Regulator 27.1 VCOVoltage regulator, simplified schematic Battery MonitorCrystal Oscillator Transmitter Test Modes Input / Output MatchingCrystal oscillator component values Unmodulated carrierCC2420 Modulated spectrum plot System Considerations and Guidelines Low-cost systems Battery operated systemsBER / PER measurements Antenna Considerations PCB Layout RecommendationsCC2420 Address Register Register type Description Configuration RegistersSaes Configuration registers overviewMain 0x10 Main Control Register Bit Field Name ResetXOSC16MBYPASS Reservedframemode Pancoordinator Adrdecode MDMCTRL0 0x11 Modem Control RegisterCCAHYST20 CCAMODE10 Autocrc Autoack Preamblelength Rssi 0x13 Rssi and CCA Status and Control Register MDMCTRL1 0x12- Modem Control RegisterCORRTHR40 Demodavgmode Modulationmode RSSIVAL70Txctrl 0x15 Transmit Control Register Syncword 0x14 Sync WordRXMIXBUFCUR10 RXCTRL0 0x16 Receive control registerRXCTRL1 0x17 Receive control register Caldone Calrunning Locklength Lockstatus Fsctrl 0x18 Frequency Synthesizer Control and StatusSECMODE10 SECCTRL0 0x19 Security Control RegisterSECCTRL1 0x1A Security Control Register Battmon 0x1B Battery Monitor Control registerSectxl Secrxl Battmonok Battmonen BattmonvoltageIOCFG1 0x1D I/O Configuration Register IOCFG0 0x1C I/O Configuration RegisterManfidl 0x1E Manufacturer ID, Lower 16 Bit HSSDSRC20 SFDMUX40 CCAMUX40Fsmtc 0x20 Finite state machine time constants Manfidh 0x1F Manufacturer ID, Upper 16 BitIsused = is * Isandmask + Isormask Manand 0x21 Manual signal and override register1Agcctrl 0x23 AGC Control Manor 0x22 Manual signal or override registerVgagainoe LnamixgainmodeoAGCTST1 0x25 AGC Test Register AGCTST0 0x24 AGC Test RegisterAGCTST2 0x26 AGC Test Register FSTST1 0x28 Frequency Synthesizer Test Register FSTST0 0x27 Frequency Synthesizer Test RegisterFSTST2 0x29 Frequency Synthesizer Test Register Rxbpftst 0x2B Receiver Bandpass Filters Test Register FSTST3 0x2A Frequency Synthesizer Test RegisterFsmstate 0x2C Finite state machine information Adctst 0x2D ADC Test Register AdcclockdisableDactst 0x2E DAC Test Register Toptst 0x2F Top Level Test Register Oscillator must be running for accessing the RxfifoTxfifo 0x3E Transmit Fifo Byte register Rxfifo 0x3F Receive Fifo Byte registerCCA test signal select table Test Output SignalsSignal output on CCA pin Description Signal output on SFD pin Description SFD test signal select tableQuad Leadless Package QLP Package Description QLPPackage thermal properties Recommended layout for package QLPSoldering information Thermal resistance40.4 Carrier tape and reel specification 40.3 Plastic tube specificationTube Specification Tape and Reel Specification42.1 Document History General InformationRevision Date Description/Changes Product Status Definitions Data Sheet Identification Product Status DefinitionTI Worldwide Technical Support Internet Address InformationProduct Information Centers 2007, Texas Instruments. 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