Texas Instruments 3138 155 232931 manual RAM access

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CC2420

Bit #

Name

Description

7

-

Reserved, ignore value

 

 

 

6

XOSC16M_STABLE

Indicates whether the 16 MHz oscillator is running or not

 

 

0

: The 16 MHz crystal oscillator is not running

 

 

1

: The 16 MHz crystal oscillator is running

 

 

 

5

TX_UNDERFLOW

Indicates whether an FIFO underflow has occurred during

 

 

transmission. Must be cleared manually with a SFLUSHTX

 

 

command strobe.

 

 

0

: No underflow has occurred

 

 

1

: An underflow has occurred

 

 

 

4

ENC_BUSY

Indicates whether the encryption module is busy

 

 

0

: Encryption module is idle

 

 

1

: Encryption module is busy

 

 

 

3

TX_ACTIVE

Indicates whether RF transmission is active

 

 

0

: RF Transmission is idle

 

 

1

: RF Transmission is active

 

 

 

2

LOCK

Indicates whether the frequency synthesizer PLL is in lock or not

 

 

0

: The PLL is out of lock

 

 

1

: The PLL is in lock

 

 

 

1

RSSI_VALID

Indicates whether the RSSI value is valid or not.

 

 

0

: The RSSI value is not valid

 

 

1

: The RSSI value is valid, always true when reception has been

 

 

enabled at least 8 symbol periods (128 us)

 

 

 

0

-

Reserved, ignore value

 

 

 

 

Table 5. Status byte returned during address transfer and TXFIFO writing

13.4 Command strobes

Command strobes may be viewed as single byte instructions to CC2420. By addressing a command strobe register internal sequences will be started. These commands must be used to enable the crystal oscillator, enable receive mode, start decryption etc. All 15 command strobes are listed in Table 11 on page 62.

When the crystal oscillator is disabled (Power Down state in Figure 25 on page 44), only the SXOSCON command strobe may be used. All other command strobes will be ignored and will have no effect. The crystal oscillator must stabilise (see the XOSC16M_STABLE status bit in Table 5) before other command strobes are accepted.

The command strobe register is accessed in the same way as for a register write operation, but no data is transferred. That is, only the RAM/Register bit (set to 0), R/W bit (set to 0) and the 6 address bits (in the range 0x00 through 0x0E) are

written. A command strobe may be followed by any other SPI access without pulling CSn high, and is executed on the last falling edge on SCLK.

13.5 RAM access

The internal 368 byte RAM may be accessed through the SPI interface. Single or multiple bytes may be read or written sending the address part (2 bytes) only once. The address is then automatically incremented by the CC2420 hardware for each new byte. Data is read and written one byte at a time, unlike register access where 2 bytes are always required after each address byte.

The crystal oscillator must be running when accessing the RAM.

The RAM/Register bit must be set high to enable RAM access. The 9 bit RAM address consists of two parts, B1:0 (MSB) selecting one of the three memory banks and A6:0 (LSB) selecting the address within the selected bank. The RAM is

SWRS041B

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Contents Product Description Key FeaturesApplications Table of contents RF Data Buffering Ordering Information General Information ITU-T AbbreviationsReferences Features Operating Conditions Absolute Maximum RatingsParameter Min Max Units Condition Parameter Min Typ Max Units ConditionOverall Electrical SpecificationsTransmit Section Parameter Min Typ Max Unit Condition / NoteReceive Section Frequency Synthesizer Section Rssi / Carrier SenseIf Section VDD Digital Inputs/OutputsVoltage Regulator Battery MonitorPower Supply CC2420 Pin Pin Name Pin type Pin Description Pin AssignmentAvddadc Circuit Description CC2420 simplified block diagramCC2420 Application Circuit Power supply decoupling and filteringInput / output matching Bias resistorDescription Overview of external componentsTransceiver Transceiver Bill of materials for the application circuits Ieee 802.15.4 Modulation Format Symbol Chip sequence C0, C1, C2, … , C31Phase Configuration OverviewSmartRF Studio user interface Evaluation SoftwareRegister access 13 4-wire Serial Configuration and Data InterfacePin configuration Parameter Symbol Min Max Units Conditions SPI timing specification Status byteRAM access Configuration registers write and read operations via SPI Address Byte Ordering Name Description CC2420 RAM Memory Space Fifo accessMultiple SPI access Microcontroller Interface and Pin Description Configuration interfaceRxfifo overflow Receive modePin activity examples during receive Demodulator, Symbol Synchroniser and Data Decision Frame Format Demodulator Simplified Block DiagramMAC protocol data unit Transmitted Synchronisation Header Length fieldFormat of the Frame Control Field FCF Frame check sequence RF Data Buffering Buffered transmit modeBuffered receive mode Fifop Unbuffered, serial modeAcknowledge Frames Address RecognitionAcknowledge frame format Radio control state machine Radio control states Keys MAC Security Operations Encryption and AuthenticationNonce / counter Ieee 802.15.4 NonceIn-line security operations CC2420 Security Flag Byte Stand-alone encryption21.7 CCM CTR mode encryption / decryptionCBC-MAC Mode LMIC Time Linear if and AGC SettingsRssi / Energy Detection TimingRF Level dBm Link Quality IndicationValue Frequency and Channel Programming Clear Channel AssessmentVCO and PLL Self-Calibration Output Power ProgrammingVoltage Regulator 27.1 VCOVoltage regulator, simplified schematic Battery MonitorCrystal Oscillator Transmitter Test Modes Input / Output MatchingCrystal oscillator component values Unmodulated carrierCC2420 Modulated spectrum plot System Considerations and Guidelines BER / PER measurements Battery operated systemsLow-cost systems Antenna Considerations PCB Layout RecommendationsCC2420 Address Register Register type Description Configuration RegistersSaes Configuration registers overviewXOSC16MBYPASS Bit Field Name ResetMain 0x10 Main Control Register CCAHYST20 CCAMODE10 Autocrc Autoack Preamblelength MDMCTRL0 0x11 Modem Control RegisterReservedframemode Pancoordinator Adrdecode Rssi 0x13 Rssi and CCA Status and Control Register MDMCTRL1 0x12- Modem Control RegisterCORRTHR40 Demodavgmode Modulationmode RSSIVAL70Txctrl 0x15 Transmit Control Register Syncword 0x14 Sync WordRXMIXBUFCUR10 RXCTRL0 0x16 Receive control registerRXCTRL1 0x17 Receive control register Caldone Calrunning Locklength Lockstatus Fsctrl 0x18 Frequency Synthesizer Control and StatusSECMODE10 SECCTRL0 0x19 Security Control RegisterSECCTRL1 0x1A Security Control Register Battmon 0x1B Battery Monitor Control registerSectxl Secrxl Battmonok Battmonen BattmonvoltageIOCFG1 0x1D I/O Configuration Register IOCFG0 0x1C I/O Configuration RegisterManfidl 0x1E Manufacturer ID, Lower 16 Bit HSSDSRC20 SFDMUX40 CCAMUX40Fsmtc 0x20 Finite state machine time constants Manfidh 0x1F Manufacturer ID, Upper 16 BitIsused = is * Isandmask + Isormask Manand 0x21 Manual signal and override register1Agcctrl 0x23 AGC Control Manor 0x22 Manual signal or override registerVgagainoe LnamixgainmodeoAGCTST2 0x26 AGC Test Register AGCTST0 0x24 AGC Test RegisterAGCTST1 0x25 AGC Test Register FSTST2 0x29 Frequency Synthesizer Test Register FSTST0 0x27 Frequency Synthesizer Test RegisterFSTST1 0x28 Frequency Synthesizer Test Register Fsmstate 0x2C Finite state machine information FSTST3 0x2A Frequency Synthesizer Test RegisterRxbpftst 0x2B Receiver Bandpass Filters Test Register Dactst 0x2E DAC Test Register AdcclockdisableAdctst 0x2D ADC Test Register Toptst 0x2F Top Level Test Register Oscillator must be running for accessing the RxfifoTxfifo 0x3E Transmit Fifo Byte register Rxfifo 0x3F Receive Fifo Byte registerSignal output on CCA pin Description Test Output SignalsCCA test signal select table Signal output on SFD pin Description SFD test signal select tableQuad Leadless Package QLP Package Description QLPPackage thermal properties Recommended layout for package QLPSoldering information Thermal resistance40.4 Carrier tape and reel specification 40.3 Plastic tube specificationTube Specification Tape and Reel SpecificationRevision Date Description/Changes General Information42.1 Document History Product Status Definitions Data Sheet Identification Product Status DefinitionProduct Information Centers Address InformationTI Worldwide Technical Support Internet 2007, Texas Instruments. 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