Texas Instruments 3138 155 232931 manual System Considerations and Guidelines

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CC2420

34 System Considerations and Guidelines

SRD regulations

International regulations and national laws regulate the use of radio receivers and transmitters. SRDs (Short Range Devices) for license free operation are allowed to operate in the 2.4 GHz band worldwide. The most important regulations are ETSI EN 300 328 and EN 300 440 (Europe), FCC CFR-47 part 15.247 and 15.249 (USA), and ARIB STD-T66 (Japan).

34.1Frequency hopping and multi- channel systems

The 2.4 GHz band is shared by many systems both in industrial, office and home environments. CC2420 uses direct sequence spread spectrum (DSSS) as defined by [1] to spread the output power, thereby making the communication link more robust even in a noisy environment.

With CC2420 it is also possible to combine both DSSS and FHSS (frequency hopping spread spectrum) in a proprietary non- IEEE 802.15.4 system. This is achieved by reprogramming the operating frequency (see the Frequency and Channel Programming section on page 50) before enabling RX or TX. A frequency synchronisation scheme must then be implemented within the proprietary MAC layer to make the transmitter and receiver operate on the same RF channel.

34.2 Data burst transmissions

The data buffering in CC2420 lets the user have a lower data rate link between the microcontroller and the RF device than the RF bit rate of 250 kbps. This allows the microcontroller to buffer data at its own speed, reducing the workload and timing requirements.

The relatively high data rate of CC2420 also reduces the average power consumption compared to the 868 / 915 MHz bands defined by [1], where only 20 / 40 kbps are available. CC2420 may be powered up a smaller portion of the time, so that the average power consumption is reduced for a given amount of data to be transferred.

34.3 Crystal accuracy and drift

A crystal accuracy of ±40 ppm is required for compliance with IEEE 802.15.4 [1]. This accuracy must also take ageing and temperature drift into consideration.

A crystal with low temperature drift and low aging could be used without further compensation. A trimmer capacitor in the crystal oscillator circuit (in parallel with C7) could be used to set the initial frequency accurately.

For non-IEEE 802.15.4 systems, the robust demodulator in CC2420 allows up to 120 ppm total frequency offset between the transmitter and receiver. This could e.g. relax the accuracy requirement to 60 ppm for each of the devices.

Optionally in a star network topology, the FFD could be equipped with a more accurate crystal thereby relaxing the requirement on the RFD. This can make sense in systems where the RFDs ship in higher volumes than the FFDs.

34.4 Communication robustness

CC2420 provides very good adjacent, alternate and co channel rejection, image frequency suppression and blocking properties. The CC2420 performance is significantly better than the requirements imposed by [1]. These are highly important parameters for reliable operation in the 2.4 GHz band, since an increasing number of devices/systems are using this license free frequency band.

34.5 Communication security

The hardware encryption and authentication operations in CC2420 enable secure communication, which is required for many applications. Security operations require a lot of data processing, which is costly in an 8-bit microcontroller system. The hardware support within CC2420 enables a high level of security even with a low-cost 8 bit controller.

SWRS041B

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Contents Key Features ApplicationsProduct Description Table of contents RF Data Buffering Ordering Information General Information ITU-T AbbreviationsReferences Features Operating Conditions Absolute Maximum RatingsParameter Min Max Units Condition Parameter Min Typ Max Units ConditionOverall Electrical SpecificationsTransmit Section Parameter Min Typ Max Unit Condition / NoteReceive Section Rssi / Carrier Sense If SectionFrequency Synthesizer Section VDD Digital Inputs/OutputsBattery Monitor Power SupplyVoltage Regulator CC2420 Pin Pin Name Pin type Pin Description Pin AssignmentAvddadc Circuit Description CC2420 simplified block diagramCC2420 Application Circuit Power supply decoupling and filteringInput / output matching Bias resistorDescription Overview of external componentsTransceiver Transceiver Bill of materials for the application circuits Ieee 802.15.4 Modulation Format Symbol Chip sequence C0, C1, C2, … , C31Phase Configuration OverviewSmartRF Studio user interface Evaluation Software13 4-wire Serial Configuration and Data Interface Pin configurationRegister access Parameter Symbol Min Max Units Conditions SPI timing specification Status byteRAM access Configuration registers write and read operations via SPI CC2420 RAM Memory Space Fifo access Multiple SPI accessAddress Byte Ordering Name Description Microcontroller Interface and Pin Description Configuration interfaceRxfifo overflow Receive modePin activity examples during receive Demodulator, Symbol Synchroniser and Data Decision Frame Format Demodulator Simplified Block DiagramMAC protocol data unit Transmitted Synchronisation Header Length fieldFormat of the Frame Control Field FCF Frame check sequence Buffered transmit mode Buffered receive modeRF Data Buffering Fifop Unbuffered, serial modeAcknowledge Frames Address RecognitionAcknowledge frame format Radio control state machine Radio control states Keys MAC Security Operations Encryption and AuthenticationNonce / counter Ieee 802.15.4 NonceIn-line security operations CC2420 Security Flag Byte Stand-alone encryptionCTR mode encryption / decryption CBC-MAC21.7 CCM Mode LMIC Time Linear if and AGC SettingsRssi / Energy Detection TimingLink Quality Indication ValueRF Level dBm Frequency and Channel Programming Clear Channel AssessmentVCO and PLL Self-Calibration Output Power ProgrammingVoltage Regulator 27.1 VCOVoltage regulator, simplified schematic Battery MonitorCrystal Oscillator Transmitter Test Modes Input / Output MatchingCrystal oscillator component values Unmodulated carrierCC2420 Modulated spectrum plot System Considerations and Guidelines Battery operated systems Low-cost systemsBER / PER measurements Antenna Considerations PCB Layout RecommendationsCC2420 Address Register Register type Description Configuration RegistersSaes Configuration registers overviewBit Field Name Reset Main 0x10 Main Control RegisterXOSC16MBYPASS MDMCTRL0 0x11 Modem Control Register Reservedframemode Pancoordinator AdrdecodeCCAHYST20 CCAMODE10 Autocrc Autoack Preamblelength Rssi 0x13 Rssi and CCA Status and Control Register MDMCTRL1 0x12- Modem Control RegisterCORRTHR40 Demodavgmode Modulationmode RSSIVAL70Txctrl 0x15 Transmit Control Register Syncword 0x14 Sync WordRXMIXBUFCUR10 RXCTRL0 0x16 Receive control registerRXCTRL1 0x17 Receive control register Caldone Calrunning Locklength Lockstatus Fsctrl 0x18 Frequency Synthesizer Control and StatusSECMODE10 SECCTRL0 0x19 Security Control RegisterSECCTRL1 0x1A Security Control Register Battmon 0x1B Battery Monitor Control registerSectxl Secrxl Battmonok Battmonen BattmonvoltageIOCFG1 0x1D I/O Configuration Register IOCFG0 0x1C I/O Configuration RegisterManfidl 0x1E Manufacturer ID, Lower 16 Bit HSSDSRC20 SFDMUX40 CCAMUX40Fsmtc 0x20 Finite state machine time constants Manfidh 0x1F Manufacturer ID, Upper 16 BitIsused = is * Isandmask + Isormask Manand 0x21 Manual signal and override register1Agcctrl 0x23 AGC Control Manor 0x22 Manual signal or override registerVgagainoe LnamixgainmodeoAGCTST0 0x24 AGC Test Register AGCTST1 0x25 AGC Test RegisterAGCTST2 0x26 AGC Test Register FSTST0 0x27 Frequency Synthesizer Test Register FSTST1 0x28 Frequency Synthesizer Test RegisterFSTST2 0x29 Frequency Synthesizer Test Register FSTST3 0x2A Frequency Synthesizer Test Register Rxbpftst 0x2B Receiver Bandpass Filters Test RegisterFsmstate 0x2C Finite state machine information Adcclockdisable Adctst 0x2D ADC Test RegisterDactst 0x2E DAC Test Register Toptst 0x2F Top Level Test Register Oscillator must be running for accessing the RxfifoTxfifo 0x3E Transmit Fifo Byte register Rxfifo 0x3F Receive Fifo Byte registerTest Output Signals CCA test signal select tableSignal output on CCA pin Description Signal output on SFD pin Description SFD test signal select tableQuad Leadless Package QLP Package Description QLPPackage thermal properties Recommended layout for package QLPSoldering information Thermal resistance40.4 Carrier tape and reel specification 40.3 Plastic tube specificationTube Specification Tape and Reel SpecificationGeneral Information 42.1 Document HistoryRevision Date Description/Changes Product Status Definitions Data Sheet Identification Product Status DefinitionAddress Information TI Worldwide Technical Support InternetProduct Information Centers 2007, Texas Instruments. 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