Texas Instruments 3138 155 232931 manual RF Data Buffering

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CC2420

17RF Data Buffering __________________________________________________________39

17.1Buffered transmit mode _____________________________________________________39

17.2Buffered receive mode _____________________________________________________39

17.3Unbuffered, serial mode ____________________________________________________40

18Address Recognition ________________________________________________________41

19Acknowledge Frames _______________________________________________________41

20Radio control state machine __________________________________________________43

21MAC Security Operations (Encryption and Authentication) _______________________45

21.1Keys____________________________________________________________________45

21.2Nonce / counter ___________________________________________________________45

21.3Stand-alone encryption _____________________________________________________46

21.4In-line security operations ___________________________________________________46

21.5CTR mode encryption / decryption ____________________________________________47

21.6CBC-MAC_______________________________________________________________47

21.7CCM ___________________________________________________________________47

21.8Timing __________________________________________________________________48

22Linear IF and AGC Settings__________________________________________________48

23RSSI / Energy Detection _____________________________________________________48

24Link Quality Indication _____________________________________________________49

25Clear Channel Assessment ___________________________________________________50

26Frequency and Channel Programming _________________________________________50

27VCO and PLL Self-Calibration _______________________________________________51

27.1VCO____________________________________________________________________51

27.2PLL self-calibration________________________________________________________51

28Output Power Programming _________________________________________________51

29Voltage Regulator __________________________________________________________51

30Battery Monitor____________________________________________________________52

31Crystal Oscillator __________________________________________________________53

32Input / Output Matching ____________________________________________________54

33Transmitter Test Modes _____________________________________________________54

33.1Unmodulated carrier _______________________________________________________54

33.2Modulated spectrum _______________________________________________________55

34System Considerations and Guidelines _________________________________________57

34.1Frequency hopping and multi-channel systems___________________________________57

34.2Data burst transmissions ____________________________________________________57

34.3Crystal accuracy and drift ___________________________________________________57

34.4Communication robustness __________________________________________________57

34.5Communication security ____________________________________________________57

34.6Low-cost systems _________________________________________________________58

34.7Battery operated systems ____________________________________________________58

34.8BER / PER measurements ___________________________________________________58

35PCB Layout Recommendations _______________________________________________59

36Antenna Considerations _____________________________________________________59

37Configuration Registers _____________________________________________________61

38Test Output Signals _________________________________________________________81

39Package Description (QLP 48) ________________________________________________83

40Recommended layout for package (QLP 48) ____________________________________84

SWRS041B

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Contents Key Features ApplicationsProduct Description Table of contents RF Data Buffering Ordering Information General Information ITU-T AbbreviationsReferences Features Parameter Min Typ Max Units Condition Absolute Maximum RatingsOperating Conditions Parameter Min Max Units ConditionParameter Min Typ Max Unit Condition / Note Electrical SpecificationsOverall Transmit SectionReceive Section Rssi / Carrier Sense If SectionFrequency Synthesizer Section VDD Digital Inputs/OutputsBattery Monitor Power SupplyVoltage Regulator CC2420 Pin Pin Name Pin type Pin Description Pin AssignmentAvddadc Circuit Description CC2420 simplified block diagramCC2420 Bias resistor Power supply decoupling and filteringApplication Circuit Input / output matchingDescription Overview of external componentsTransceiver Transceiver Bill of materials for the application circuits Ieee 802.15.4 Modulation Format Symbol Chip sequence C0, C1, C2, … , C31Phase Configuration OverviewSmartRF Studio user interface Evaluation Software13 4-wire Serial Configuration and Data Interface Pin configurationRegister access Parameter Symbol Min Max Units Conditions SPI timing specification Status byteRAM access Configuration registers write and read operations via SPI CC2420 RAM Memory Space Fifo access Multiple SPI accessAddress Byte Ordering Name Description Microcontroller Interface and Pin Description Configuration interfaceRxfifo overflow Receive modePin activity examples during receive Demodulator, Symbol Synchroniser and Data Decision Frame Format Demodulator Simplified Block DiagramMAC protocol data unit Transmitted Synchronisation Header Length fieldFormat of the Frame Control Field FCF Frame check sequence Buffered transmit mode Buffered receive modeRF Data Buffering Fifop Unbuffered, serial modeAcknowledge Frames Address RecognitionAcknowledge frame format Radio control state machine Radio control states Ieee 802.15.4 Nonce MAC Security Operations Encryption and AuthenticationKeys Nonce / counterIn-line security operations CC2420 Security Flag Byte Stand-alone encryptionCTR mode encryption / decryption CBC-MAC21.7 CCM Timing Linear if and AGC SettingsMode LMIC Time Rssi / Energy DetectionLink Quality Indication ValueRF Level dBm Frequency and Channel Programming Clear Channel Assessment27.1 VCO Output Power ProgrammingVCO and PLL Self-Calibration Voltage RegulatorVoltage regulator, simplified schematic Battery MonitorCrystal Oscillator Unmodulated carrier Input / Output MatchingTransmitter Test Modes Crystal oscillator component valuesCC2420 Modulated spectrum plot System Considerations and Guidelines Battery operated systems Low-cost systemsBER / PER measurements Antenna Considerations PCB Layout RecommendationsCC2420 Address Register Register type Description Configuration RegistersSaes Configuration registers overviewBit Field Name Reset Main 0x10 Main Control RegisterXOSC16MBYPASS MDMCTRL0 0x11 Modem Control Register Reservedframemode Pancoordinator AdrdecodeCCAHYST20 CCAMODE10 Autocrc Autoack Preamblelength RSSIVAL70 MDMCTRL1 0x12- Modem Control RegisterRssi 0x13 Rssi and CCA Status and Control Register CORRTHR40 Demodavgmode ModulationmodeTxctrl 0x15 Transmit Control Register Syncword 0x14 Sync WordRXMIXBUFCUR10 RXCTRL0 0x16 Receive control registerRXCTRL1 0x17 Receive control register Caldone Calrunning Locklength Lockstatus Fsctrl 0x18 Frequency Synthesizer Control and StatusSECMODE10 SECCTRL0 0x19 Security Control RegisterBattmonok Battmonen Battmonvoltage Battmon 0x1B Battery Monitor Control registerSECCTRL1 0x1A Security Control Register Sectxl SecrxlHSSDSRC20 SFDMUX40 CCAMUX40 IOCFG0 0x1C I/O Configuration RegisterIOCFG1 0x1D I/O Configuration Register Manfidl 0x1E Manufacturer ID, Lower 16 BitFsmtc 0x20 Finite state machine time constants Manfidh 0x1F Manufacturer ID, Upper 16 BitIsused = is * Isandmask + Isormask Manand 0x21 Manual signal and override register1Lnamixgainmodeo Manor 0x22 Manual signal or override registerAgcctrl 0x23 AGC Control VgagainoeAGCTST0 0x24 AGC Test Register AGCTST1 0x25 AGC Test RegisterAGCTST2 0x26 AGC Test Register FSTST0 0x27 Frequency Synthesizer Test Register FSTST1 0x28 Frequency Synthesizer Test RegisterFSTST2 0x29 Frequency Synthesizer Test Register FSTST3 0x2A Frequency Synthesizer Test Register Rxbpftst 0x2B Receiver Bandpass Filters Test RegisterFsmstate 0x2C Finite state machine information Adcclockdisable Adctst 0x2D ADC Test RegisterDactst 0x2E DAC Test Register Rxfifo 0x3F Receive Fifo Byte register Oscillator must be running for accessing the RxfifoToptst 0x2F Top Level Test Register Txfifo 0x3E Transmit Fifo Byte registerTest Output Signals CCA test signal select tableSignal output on CCA pin Description Signal output on SFD pin Description SFD test signal select tableQuad Leadless Package QLP Package Description QLPThermal resistance Recommended layout for package QLPPackage thermal properties Soldering informationTape and Reel Specification 40.3 Plastic tube specification40.4 Carrier tape and reel specification Tube SpecificationGeneral Information 42.1 Document HistoryRevision Date Description/Changes Product Status Definitions Data Sheet Identification Product Status DefinitionAddress Information TI Worldwide Technical Support InternetProduct Information Centers 2007, Texas Instruments. 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