Texas Instruments 3138 155 232931 manual MDMCTRL1 0x12- Modem Control Register, RSSIVAL70

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CC2420

MDMCTRL1 (0x12)– Modem Control Register 1

	Bit	Field Name	Reset	R/W
	15:11	-	0	W0
	10:6	CORR_THR[4:0]	20	R/W

	5	DEMOD_AVG_MODE	0	R/W

	4	MODULATION_MODE	0	R/W

	3:2	TX_MODE[1:0]	0	R/W

1:0

RX_MODE[1:0]

0

R/W

Description

Reserved, write as 0.

Demodulator correlator threshold value, required before SFD search. Note that on early CC2420 versions the reset value was 0.

Frequency offset average filter behaviour.

0 : Lock frequency offset filter after preamble match

1 : Continuously update frequency offset filter.

Set one of two RF modulation modes for RX / TX

0 : IEEE 802.15.4 compliant mode

1 : Reversed phase, non-IEEE compliant (could be used to set up a system which will not receive 802.15.4 packets)

Set test modes for TX

0 : Buffered mode, use TXFIFO (normal operation)

1 : Serial mode, use transmit data on serial interface, infinite transmission. For lab testing only.

2 : TXFIFO looping ignore underflow in TXFIFO and read cyclic, infinite transmission. For lab testing only.

3 : Send random data from CRC, infinite transmission. For lab testing only.

Set test mode of RX

0 : Buffered mode, use RXFIFO (normal operation)

1 : Receive serial mode, output received data on pins. Infinite RX. For lab testing only.

2 : RXFIFO looping ignore overflow in RXFIFO and write cyclic, infinite reception. For lab testing only.

3 : Reserved

RSSI (0x13) - RSSI and CCA Status and Control Register

	Bit	Field Name	Reset	R/W
	15:8	CCA_THR[7:0]	-32	R/W

7:0

RSSI_VAL[7:0]

-128 R

Description

Clear Channel Assessment threshold value, signed number on 2’s complement for comparison with the RSSI.

The unit is 1 dB, offset is the same as for RSSI_VAL. The CCA signal goes active when the received signal is below this value. The CCA signal is available on the CCA pin.

The reset value is approximately -77 dBm.

RSSI estimate on a logarithmic scale, signed number on 2’s complement.

Unit is 1 dB, offset is described in the RSSI / Energy Detection section on page 48.

The RSSI_VAL value is averaged over 8 symbol periods. The RSSI_VALID status bit may be checked to verify that the receiver has been enabled for at least 8 symbol periods.

The reset value of –128 also indicates that the RSSI_VAL value is invalid.

SWRS041B

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Contents Product Description Key FeaturesApplications Table of contents RF Data Buffering Ordering Information General Information ITU-T AbbreviationsReferences Features Operating Conditions Absolute Maximum RatingsParameter Min Max Units Condition Parameter Min Typ Max Units ConditionOverall Electrical SpecificationsTransmit Section Parameter Min Typ Max Unit Condition / NoteReceive Section Frequency Synthesizer Section Rssi / Carrier SenseIf Section VDD Digital Inputs/OutputsVoltage Regulator Battery MonitorPower Supply CC2420 Pin Pin Name Pin type Pin Description Pin AssignmentAvddadc Circuit Description CC2420 simplified block diagramCC2420 Application Circuit Power supply decoupling and filteringInput / output matching Bias resistorDescription Overview of external componentsTransceiver Transceiver Bill of materials for the application circuits Ieee 802.15.4 Modulation Format Symbol Chip sequence C0, C1, C2, … , C31Phase Configuration OverviewSmartRF Studio user interface Evaluation SoftwareRegister access 13 4-wire Serial Configuration and Data InterfacePin configuration Parameter Symbol Min Max Units Conditions SPI timing specification Status byteRAM access Configuration registers write and read operations via SPI Address Byte Ordering Name Description CC2420 RAM Memory Space Fifo accessMultiple SPI access Microcontroller Interface and Pin Description Configuration interfaceRxfifo overflow Receive modePin activity examples during receive Demodulator, Symbol Synchroniser and Data Decision Frame Format Demodulator Simplified Block DiagramMAC protocol data unit Transmitted Synchronisation Header Length fieldFormat of the Frame Control Field FCF Frame check sequence RF Data Buffering Buffered transmit modeBuffered receive mode Fifop Unbuffered, serial modeAcknowledge Frames Address RecognitionAcknowledge frame format Radio control state machine Radio control states Keys MAC Security Operations Encryption and AuthenticationNonce / counter Ieee 802.15.4 NonceIn-line security operations CC2420 Security Flag Byte Stand-alone encryption21.7 CCM CTR mode encryption / decryptionCBC-MAC Mode LMIC Time Linear if and AGC SettingsRssi / Energy Detection TimingRF Level dBm Link Quality IndicationValue Frequency and Channel Programming Clear Channel AssessmentVCO and PLL Self-Calibration Output Power ProgrammingVoltage Regulator 27.1 VCOVoltage regulator, simplified schematic Battery MonitorCrystal Oscillator Transmitter Test Modes Input / Output MatchingCrystal oscillator component values Unmodulated carrierCC2420 Modulated spectrum plot System Considerations and Guidelines BER / PER measurements Battery operated systemsLow-cost systems Antenna Considerations PCB Layout RecommendationsCC2420 Address Register Register type Description Configuration Registers Saes Configuration registers overviewXOSC16MBYPASS Bit Field Name ResetMain 0x10 Main Control Register CCAHYST20 CCAMODE10 Autocrc Autoack Preamblelength MDMCTRL0 0x11 Modem Control RegisterReservedframemode Pancoordinator Adrdecode Rssi 0x13 Rssi and CCA Status and Control Register MDMCTRL1 0x12- Modem Control RegisterCORRTHR40 Demodavgmode Modulationmode RSSIVAL70Txctrl 0x15 Transmit Control Register Syncword 0x14 Sync WordRXMIXBUFCUR10 RXCTRL0 0x16 Receive control registerRXCTRL1 0x17 Receive control register Caldone Calrunning Locklength Lockstatus Fsctrl 0x18 Frequency Synthesizer Control and StatusSECMODE10 SECCTRL0 0x19 Security Control RegisterSECCTRL1 0x1A Security Control Register Battmon 0x1B Battery Monitor Control registerSectxl Secrxl Battmonok Battmonen BattmonvoltageIOCFG1 0x1D I/O Configuration Register IOCFG0 0x1C I/O Configuration RegisterManfidl 0x1E Manufacturer ID, Lower 16 Bit HSSDSRC20 SFDMUX40 CCAMUX40Fsmtc 0x20 Finite state machine time constants Manfidh 0x1F Manufacturer ID, Upper 16 BitIsused = is * Isandmask + Isormask Manand 0x21 Manual signal and override register1Agcctrl 0x23 AGC Control Manor 0x22 Manual signal or override registerVgagainoe LnamixgainmodeoAGCTST2 0x26 AGC Test Register AGCTST0 0x24 AGC Test RegisterAGCTST1 0x25 AGC Test Register FSTST2 0x29 Frequency Synthesizer Test Register FSTST0 0x27 Frequency Synthesizer Test RegisterFSTST1 0x28 Frequency Synthesizer Test Register Fsmstate 0x2C Finite state machine information FSTST3 0x2A Frequency Synthesizer Test RegisterRxbpftst 0x2B Receiver Bandpass Filters Test Register Dactst 0x2E DAC Test Register AdcclockdisableAdctst 0x2D ADC Test Register Toptst 0x2F Top Level Test Register Oscillator must be running for accessing the RxfifoTxfifo 0x3E Transmit Fifo Byte register Rxfifo 0x3F Receive Fifo Byte registerSignal output on CCA pin Description Test Output SignalsCCA test signal select table Signal output on SFD pin Description SFD test signal select tableQuad Leadless Package QLP Package Description QLPPackage thermal properties Recommended layout for package QLPSoldering information Thermal resistance40.4 Carrier tape and reel specification 40.3 Plastic tube specificationTube Specification Tape and Reel SpecificationRevision Date Description/Changes General Information42.1 Document History Product Status Definitions Data Sheet Identification Product Status DefinitionProduct Information Centers Address InformationTI Worldwide Technical Support Internet 2007, Texas Instruments. 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