Texas Instruments 3138 155 232931 manual CC2420

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					CC2420
		RBW	10 kHz	RF Att	30 dB
Ref Lvl		VBW	10 kHz
3 dBm		SWT	50 ms	Unit	dBm
3
0					A
					A
-10
-20
-30 1AVG					1SA
-40
-50
-60
-70
-80
-90
-97
Center 2.45 GHz		200 kHz/		Span 2 MHz
Date:	23.OCT.2003	21:38:33

Figure 31. Single carrier output

33.2 Modulated spectrum

The CC2420 has a built-in test pattern generator that can generate pseudo random sequence using the CRC generator. This is enabled by setting MDMCTRL1.TX_MODE to 3 and issues an STXON command strobe. The modulated spectrum is then available on the RF pins. The low byte of the CRC word is transmitted and the CRC is updated with 0xFF for each new byte. The length of the transmitted data sequence is 65535 bits. The transmitted data-sequence is then:

[Synchronisation header] [0x00, 0x78, 0xb8, 0x4b, 0x99, 0xc3, 0xe9, …]

Since a synchronisation header (preamble and SFD) is transmitted in all TX modes, this test mode may also be used to transmit a known pseudorandom bit

sequence for bit error testing. Please note

that CC2420 requires symbol

synchronisation, not only bit synchronisation, for correct reception. Packet error rate is therefore a better measurement for the true RF performance.

Another option to generate a modulated spectrum is to fill the TXFIFO with pseudo-

random data and set MDMCTRL1.TX_MODE to 2. CC2420 will then transmit data from the FIFO disregarding a TXFIFO underflow. The length of the transmitted data sequence is then 1024 bits (128 bytes).

A plot of the modulated spectrum from CC2420 is shown in Figure 32. Note that to find the output power from the modulated spectrum, the RBW must be set to 3 MHz or higher.

SWRS041B

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Contents Applications Key FeaturesProduct Description Table of contents RF Data Buffering Ordering Information General Information ITU-T AbbreviationsReferences Features Parameter Min Typ Max Units Condition Absolute Maximum RatingsOperating Conditions Parameter Min Max Units ConditionParameter Min Typ Max Unit Condition / Note Electrical SpecificationsOverall Transmit SectionReceive Section If Section Rssi / Carrier SenseFrequency Synthesizer Section VDD Digital Inputs/OutputsPower Supply Battery MonitorVoltage Regulator CC2420 Pin Pin Name Pin type Pin Description Pin AssignmentAvddadc Circuit Description CC2420 simplified block diagramCC2420 Bias resistor Power supply decoupling and filteringApplication Circuit Input / output matchingDescription Overview of external componentsTransceiver Transceiver Bill of materials for the application circuits Ieee 802.15.4 Modulation Format Symbol Chip sequence C0, C1, C2, … , C31Phase Configuration OverviewSmartRF Studio user interface Evaluation SoftwarePin configuration 13 4-wire Serial Configuration and Data InterfaceRegister access Parameter Symbol Min Max Units Conditions SPI timing specification Status byteRAM access Configuration registers write and read operations via SPI Multiple SPI access CC2420 RAM Memory Space Fifo accessAddress Byte Ordering Name Description Microcontroller Interface and Pin Description Configuration interfaceRxfifo overflow Receive modePin activity examples during receive Demodulator, Symbol Synchroniser and Data Decision Frame Format Demodulator Simplified Block DiagramMAC protocol data unit Transmitted Synchronisation Header Length fieldFormat of the Frame Control Field FCF Frame check sequence Buffered receive mode Buffered transmit modeRF Data Buffering Fifop Unbuffered, serial modeAcknowledge Frames Address RecognitionAcknowledge frame format Radio control state machine Radio control states Ieee 802.15.4 Nonce MAC Security Operations Encryption and AuthenticationKeys Nonce / counterIn-line security operations CC2420 Security Flag Byte Stand-alone encryptionCBC-MAC CTR mode encryption / decryption21.7 CCM Timing Linear if and AGC SettingsMode LMIC Time Rssi / Energy DetectionValue Link Quality IndicationRF Level dBm Frequency and Channel Programming Clear Channel Assessment27.1 VCO Output Power ProgrammingVCO and PLL Self-Calibration Voltage RegulatorVoltage regulator, simplified schematic Battery MonitorCrystal Oscillator Unmodulated carrier Input / Output MatchingTransmitter Test Modes Crystal oscillator component valuesCC2420 Modulated spectrum plot System Considerations and Guidelines Low-cost systems Battery operated systemsBER / PER measurements Antenna Considerations PCB Layout RecommendationsCC2420 Address Register Register type Description Configuration RegistersSaes Configuration registers overviewMain 0x10 Main Control Register Bit Field Name ResetXOSC16MBYPASS Reservedframemode Pancoordinator Adrdecode MDMCTRL0 0x11 Modem Control RegisterCCAHYST20 CCAMODE10 Autocrc Autoack Preamblelength RSSIVAL70 MDMCTRL1 0x12- Modem Control RegisterRssi 0x13 Rssi and CCA Status and Control Register CORRTHR40 Demodavgmode ModulationmodeTxctrl 0x15 Transmit Control Register Syncword 0x14 Sync WordRXMIXBUFCUR10 RXCTRL0 0x16 Receive control registerRXCTRL1 0x17 Receive control register Caldone Calrunning Locklength Lockstatus Fsctrl 0x18 Frequency Synthesizer Control and StatusSECMODE10 SECCTRL0 0x19 Security Control RegisterBattmonok Battmonen Battmonvoltage Battmon 0x1B Battery Monitor Control registerSECCTRL1 0x1A Security Control Register Sectxl SecrxlHSSDSRC20 SFDMUX40 CCAMUX40 IOCFG0 0x1C I/O Configuration RegisterIOCFG1 0x1D I/O Configuration Register Manfidl 0x1E Manufacturer ID, Lower 16 BitFsmtc 0x20 Finite state machine time constants Manfidh 0x1F Manufacturer ID, Upper 16 BitIsused = is * Isandmask + Isormask Manand 0x21 Manual signal and override register1Lnamixgainmodeo Manor 0x22 Manual signal or override registerAgcctrl 0x23 AGC Control VgagainoeAGCTST1 0x25 AGC Test Register AGCTST0 0x24 AGC Test RegisterAGCTST2 0x26 AGC Test Register FSTST1 0x28 Frequency Synthesizer Test Register FSTST0 0x27 Frequency Synthesizer Test RegisterFSTST2 0x29 Frequency Synthesizer Test Register Rxbpftst 0x2B Receiver Bandpass Filters Test Register FSTST3 0x2A Frequency Synthesizer Test RegisterFsmstate 0x2C Finite state machine information Adctst 0x2D ADC Test Register AdcclockdisableDactst 0x2E DAC Test Register Rxfifo 0x3F Receive Fifo Byte register Oscillator must be running for accessing the RxfifoToptst 0x2F Top Level Test Register Txfifo 0x3E Transmit Fifo Byte registerCCA test signal select table Test Output SignalsSignal output on CCA pin Description Signal output on SFD pin Description SFD test signal select tableQuad Leadless Package QLP Package Description QLPThermal resistance Recommended layout for package QLPPackage thermal properties Soldering informationTape and Reel Specification 40.3 Plastic tube specification40.4 Carrier tape and reel specification Tube Specification42.1 Document History General InformationRevision Date Description/Changes Product Status Definitions Data Sheet Identification Product Status DefinitionTI Worldwide Technical Support Internet Address InformationProduct Information Centers 2007, Texas Instruments. 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