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Chapter 7 |
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186XL 80186XL Processor Test - This routine verifies that the internal registers of the 80186 can be loaded with a sequence of data patterns, checks the arithmetic and logical data handling for correct results and flags, confirms that the program jump instructions function, plus verifies the 80186 can read and write memory.
0 ⇒ Skip the 80186 Processor test.
1 ⇒ Perform the 80186 Processor test.
RAM 512 Kbyte Data Buffer Test - This test writes various data patterns to the Data Buffer, then reads it back to verify.
0 ⇒ Skip the Data Buffer test.
1 ⇒ Perform the Data Buffer test.
PSI Pipelined System Interface Test - This test writes a variety of data patterns to the registers and counters of the Pipelined System Interface and then reads them back to verify. It also confirms that the address and transfer counters accurately reflect the proper DMA transfer mode. (i.e. adjusted for word or longword values).
0 ⇒ Skip the Pipelined System Interface test.
1 ⇒ Perform the Pipelined System Interface test.
STT SCSI Termination Test - This test checks for a blown SCSI termination power fuse and also verifies a good voltage at TERM PWR pin on the SCSI connector.
0 ⇒ Skip the SCSI Termination test.
1 ⇒ Perform the SCSI Termination test.
QLG QLogic Fast SCSI chip Test - This test writes a progression of data patterns to the registers and counters of the QLogic Fast SCSI chip, then reads each back to verify the pattern.
0 ⇒ Skip the QLogic Fast SCSI chip test.
1 ⇒ Perform the QLogic Fast SCSI chip test.
Command Code
The command code for this operation is 09H.
User’s Guide | 21020285 D |