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Cypress CYV15G0404DXB manual Receive BIST State Machine

Models: CYV15G0404DXB

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CYV15G0404DXB

Figure 2. Receive BIST State Machine

					Monitor Data
					Received


RXSTx	=	RXSTx	=
RXSTx	=	RXSTx	=
BIST_WAIT	(111)	BIST_START	(101)
					Elasticity
					Elasticity
				Yes	Buffer Error
				Yes	Buffer Error

RXSTx =

BIST_START (101)

Receive BIST
Detected LOW		RX PLL
		RX PLL
	Out of Lock
	Out of Lock

	Start of	No
No	BIST Detected	No

Yes, RXSTx =

BIST_DATA_COMPARE (000) / BIST_COMMAND_COMPARE (001)

		Compare
		Next Character			RXSTx =
	Mismatch				RXSTx =
	Mismatch			Match BIST_COMMAND_COMPARE (001)
	Auto-Abort			Data or	Command
Yes	Auto-Abort			Command
Yes	Condition			Command
	Condition
	No				RXSTx =
	No			Data	BIST_DATA_COMPARE (000)
	End-of-BIST			End-of-BIST	No
	State			State
	Yes, RXSTx =			Yes, RXSTx =
	BIST_LAST_BAD (100)			Yes, RXSTx =
	BIST_LAST_BAD (100)		BIST_LAST_GOOD (010)
			BIST_LAST_GOOD (010)
		No, RXSTx =
		BIST_ERROR (110)

Document #: 38-02097 Rev. *B

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Cypress CYV15G0404DXB manual Receive BIST State Machine

Contents

CYV15G0404DXB FeaturesFunctional Description Independent Clock Quad HOTLink II Transceiver with ReclockerPhase CYV15G0404DXB Transceiver Logic Block DiagramElasticity AlignPhase-Align Buffer Transmit Path Block DiagramCYV15G0404DXB JTAG CYV15G0404DXBBoundary Scan= Internal Signal Device Configuration and Control BlockCYV15G0404DXB + FeedbackCYV15G0404DXB Pin Configuration Top ViewCYV15G0404DXB Pin Configuration Bottom ViewI/O Characteristics Pin Definitions CYV15G0404DXB Quad HOTLink II TransceiverSignal Description Transmit Path Data and Status SignalsCYV15G0404DXB Pin Definitions continued CYV15G0404DXB Quad HOTLink II TransceiverReceive Path Data Pin Definitions continued CYV15G0404DXB Quad HOTLink II Transceiver CYV15G0404DXBPage 10 of CYV15G0404DXB Configuration LatchesPin Definitions continued CYV15G0404DXB Quad HOTLink II Transceiver CYV15G0404DXB HOTLink II Operation Phase Align BufferCYV15G0404DXB Transmit Data Path Input RegisterData Encoding EncoderSignal Name CYV15G0404DXBTransmit Modes Transmit BISTTransmit PLL Clock Multiplier Encoder BypassTransmit Channels Enabled Signal Detect/Link FaultSerial Output Drivers CYV15G0404DXB Receive Data PathReceive Channel Enabled Clock/Data RecoveryReclocker Deserializer/FramerReceive BIST Operation 10B/8B Decoder BlockFramer CYV15G0404DXBDevice Reset State Power ControlOutput Bus Receive Elasticity BufferReceive Status Bits Device Configuration and Control InterfaceBIST Status State Machine CYV15G0404DXBForce Global Enable Function Global Enable FunctionMask Function Latch TypesPage 21 of CYV15G0404DXBPage 22 of CYV15G0404DXBJTAG Support Device Configuration StrategyTable 10. Device Control Latch Configuration Table CYV15G0404DXBJTAG ID 3-Level Select InputsCYV15G0404DXB Receive Character Status BitsFigure 2. Receive BIST State Machine CYV15G0404DXBPower Up Requirements CYV15G0404DXB DC Electrical CharacteristicsMaximum Ratings Operating RangeAC Test Loads and Waveforms CYV15G0404DXB DC Electrical Characteristics continuedCYV15G0404DXB Transmitter LVTTL Switching Characteristics Over the Operating Range CYV15G0404DXB AC Electrical CharacteristicsCYV15G0404DXB Bus Configuration Write Timing Characteristics Over the CYV15G0404DXB AC Electrical Characteristics continuedJTAG Test Clock Characteristics Over the Operating Range RESETCapacitance20 CYV15G0404DXB HOTLink II Transmitter Switching WaveformsTransmit Interface Write Timing REFCLKx selected TXRATEx = CYV15G0404DXB AC Electrical Characteristics continuedTransmit Interface CYV15G0404DXB HOTLink II Transmitter Switching Waveforms continuedWrite Timing REFCLKx selectedReceive Interface Read Timing Recovered Clock selected RXRATEx = Switching Waveforms for the CYV15G0404DXB HOTLink II ReceiverCYV15G0404DXB Receive Interface Read Timing REFCLKx Selected full rate RXCLKx±DATA70 ADDR30WREN Switching Waveforms for the CYV15G0404DXB HOTLink II ReceiverCYV15G0404DXB CYV15G0404DXB Notation Conventions X3.230 Codes and Notation Conventions8B/10B Transmission Code Transmission OrderCYV15G0404DXB Use of the Tables for Generating Transmission CharactersDIN or QOUT Page 38 of CYV15G0404DXBValid Data Characters TXCTx0 = 0, RXSTx20 = 000 continued CYV15G0404DXBPage 39 of Page 40 of CYV15G0404DXBPage 41 of CYV15G0404DXBK28.5 41 CYV15G0404DXBK28.7 41 Running DisparityOrdering Information Package DiagramCYV15G0404DXB + FeedbackCYV15G0404DXB ISSUEDocument History Page Document Number