Fujitsu MPA3035AT, MPA3043AT Ultra DMA data out commands, Initiating an Ultra DMA data out burst

10)If the host has not placed the result of its CRC calculation on DD (15:0) since first driving DD (15:0) during (9), the host shall place the result of its CRC calculation on DD (15:0) (see 5.5.5).

11)The host shall negate DMACK- no sooner than tMLI after the device has asserted DSTROBE and negated DMARQ and the host has asserted STOP and negated HDMARDY-, and no sooner than tDVS after the host places the result of its CRC calculation on DD (15:0).

12)The device shall latch the host's CRC data from DD (15:0) on the negating edge of DMACK-.

13)The device shall compare the CRC data received from the host with the results of its own CRC calculation. If a miscompare error occurs during one or more Ultra DMA burst for any one command, at the end of the command, the device shall report the first error that occurred (see 5.5.5).

14)The device shall release DSTROBE within tIORDYZ after the host negates DMACK-.

15)The host shall neither negate STOP nor assert HDMARDY- until at least tACK after the host has negated DMACK-.

16)The host shall not assert DIOR-, CS0-, CS1-, DA2, DA1, or DA0 until at least tACK after negating DMACK.

5.5.4Ultra DMA data out commands

5.5.4.1Initiating an Ultra DMA data out burst

The following steps shall occur in the order they are listed unless otherwise specifically allowed (see 5.6.4.7 and 5.6.4.2 for specific timing requirements):

1)The host shall keep DMACK- in the negated state before an Ultra DMA burst is initiated.

2)The device shall assert DMARQ to initiate an Ultra DMA burst.

3)Steps (3), (4), and (5) may occur in any order or at the same time. The host shall assert STOP.

4)The host shall assert HSTROBE.

5)The host shall negate CS0-, CS1-, DA2, DA1, and DA0. The host shall keep CS0-, CS1-, DA2, DA1, and DA0 negated until after negating DMACK- at the end of the burst.

6)Steps (3), (4), and (5) shall have occurred at least tACK before the host asserts DMACK-. The host shall keep DMACK- asserted until the end of an Ultra DMA burst.

7)The device may negate DDMARDY- tZIORDY after the host has asserted DMACK-. Once the device has negated DDMARDY-, the device shall not release DDMARDY- until after the host has negated DMACK- at the end of an Ultra DMA burst.

8)The host shall negate STOP within tENV after asserting DMACK-. The host shall not assert STOP until after the first negation of HSTROBE.

C141-E034-02EN 5 - 67