[signal] | [I/O] | [Description] |
| I | IOR– is the strobe signal asserted by the host to read device registers |
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| or the data port. |
HSTROBE |
| HDMARDY– is a flow control signal for Ultra DMA data in bursts. |
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| This signal is asserted by the host to indicate to the device that the |
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| host is ready to receive Ultra DMA data in bursts. |
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| The host may negate HDMARDY- to pause an Ultra DMA data in |
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| burst. |
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| HSTROBE is the data out strobe signal from the host for an Ultra |
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| DMA data out burst. Both the rising and falling edge of HSTROBE |
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| latch the data from DATA |
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| generating HSTROBE edges to pause an Ultra DMA data out burst. |
INTRQ | O | Interrupt signal to the host. |
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| This signal is negated in the following cases: |
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| – assertion of RESET– signal |
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| – Reset by SRST of the Device Control register |
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| – Write to the command register by the host |
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| – Read of the status register by the host |
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| – Completion of sector data transfer |
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| (without reading the Status register) |
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| When the device is not selected or interrupt is disabled |
IOCS16– | O | This signal indicates |
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| This signal is an open collector output. |
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| – When IOCS16- is not asserted: |
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| 8 bit data is transferred through DATA0 to DATA7 signals. |
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| – When IOCS16- is asserted: |
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| 16 bit data is transferred through DATA0 to DATA15 signals. |
CS0– | I | Chip select signal decoded from the host address bus. This signal is |
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| used by the host to select the command block registers. |
CS1– | I | Chip select signal decoded from the host address bus. This signal is |
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| used by the host to select the control block registers. |
DA | I | Binary decoded address signals asserted by the host to access task |
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| file registers. |
KEY | – | Key pin for prevention of erroneous connector insertion |
PIDAG– | I/O | This signal is an input mode for the master device and an output |
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| mode for the slave device in a daisy chain configuration. This signal |
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| indicates that the slave device has been completed self diagnostics. |
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| This signal is pulled up to +5 V through 10 kΩ resistor at each device. |
DASP– | I/O | This is a |
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| active and a slave device is present. |
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| This signal is pulled up to +5 V through 10 kΩ resistor at each device. |
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