5.6.4Ultra DMA data transfer

Figures 5.12 through 5.21 define the timings associated with all phases of Ultra DMA bursts. Table 5.12 contains the values for the timings for each of the Ultra DMA Modes.

5.6.4.1Initiating an Ultra DMA data in burst

5.6.4.2 contains the values for the timings for each of the Ultra DMA Modes.

Note: The definitions for the STOP, HDMARDY and DSTROBE signal lines are not in effect until DMARQ and DMACK are asserted.

Figure 5.12 Initiating an Ultra DMA data in burst

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Fujitsu MPA3035AT, MPA3043AT, MPA3052AT, MPA3026AT, MPA3017AT Ultra DMA data transfer, Initiating an Ultra DMA data in burst