
5K320 SATA OEM Specification
14.20Read Native Max Address (F8h)
Block Output Registers Command
Register | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Data | - | - | - | - | - | - | - | - |
Feature | - | - | - | - | - | - | - | - |
Sector Count | - | - | - | - | - | - | - | - |
LBA Low | - | - | - | - | - | - | - | - |
LBA Mid | - | - | - | - | - | - | - | - |
LBA High | - | - | - | - | - | - | - | - |
Device | - | L | - | - | - | - | - | - |
Command | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |
Command Block Input Registers
Register | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Data | - | - | - | - | - | - | - | - |
Error |
|
| ...See Below... |
|
| |||
Sector Count | - | - | - | - | - | - | - | - |
LBA Low | V V V V V V | V V | ||||||
LBA Mid | V V V V V V | V V | ||||||
LBA High | V V V V V V | V V | ||||||
Device | - | - | - | - | H | H | H | H |
Status |
|
| ...See Below... |
|
|
Error Register
7 | 6 | 5 | 4 | 3 | 2 | 1 |
| 0 |
CRC | UNC | 0 | IDN | 0 | ABT | T0N |
| AM |
|
|
|
|
|
|
|
| N |
0 | 0 | 0 | 0 | 0 | V | 0 |
| 0 |
Table 86 Read Native Max Address Command (F8h)
Status Register
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
BSY | RDY | DF | DSC | DRQ | COR | IDX | ERR |
0 | V | 0 | - | - | 0 | 0 | V |
This command returns the native max LBA/CYL of HDD which is not affected by Set Max Address command.
The
Output Parameters To The Device
L | LBA mode.Indicates the addressing mode.L=0 specifies CHS mode and L=1 does LBA |
D | addressing mode. |
The device number bit. Indicates that the device number bit of the Device Register | |
- | should be specified. D=0 selects the master device and D=1 selects the slave device. |
Indicates that the bit is not used. | |
Input Parameters From The Device | |
LBA Low | In LBA mode, this register contains native max LBA bits 0 - 7. (L=1) |
LBA High/Mid | In CHS mode, this register contains native max LBA Low. (L=0) |
In LBA mode, this register contains native max LBA bits 8 - 15 (Mid), 16 - 23 (High). | |
| (L=1) |
H | In CHS mode, this register contains native max cylinder number. (L=0) |
In LBA mode, this register contains native max LBA bits 24 - 27. (L=1) | |
V | In CHS mode, this register contains native max head number.(L=0) |
Valid. Indicates that the bit is part of an input parameter and will be set to 0 or 1 by the | |
- | device. |
Indicates that the bit is not used. |
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