HP Car 3490A manual Integratorcircuits, Dual-SlopeIntegration, IntegratingAmplifier

Model34904	SectionIV
	DC AMPLIFIER

ac coNv

OUTPUT

J 6 N ' A U T O Z E R O

I . AUTO ZERO DISA6L € ,

USED ONLY DURING

SAMPL € / HOLD OPERAIION

The following notes refer to waveforms on preceding page:

A . AUTO ZERO: lf hold is selected,wait for trigger . lf hold is not selected, determine sample rate delay. Check function and range. lf range is not valid for function selected, uprange and downrange as necessary.

8.AUTO ZERO: Insert response time delay required for range and function selected. DC = 0 delay; AC = 85 ohms delay; 10 Mo = 350 ms delay; 1 MA = 50 ms delay; other ranges= 0 delay.

C . Range gain with input short (FET Cl . Gain can be either FET K, L, or M .

D . Input signalapplied to input amplifier .

E. Reference applied to input amplif ier.

F . Referencegein with input shorted (FET K) .

G . Auto Zero (65 ms of auto zero) .

H . Integratorrun - rup (50 ms) .

J. Integratorrundown (0 - 60 ms).

K. Selectreferencepolarityor ohm'sreference.

HIGHTRUEWAVEFORMINFORMATION

AUTO ZERO=MT-B

SIGNALVOLTAGEGAIN = MTA,MTB

=

SIGNALVOLTAGEAPPLIED MTA . MTB,MTC REFERENCEVOLTAGEGAIN =MTA, MTB

REFERENCEVOLTAGEAPPLIED= ili=iÄ,TUTC

INPUTSHORT= MTC-

MTA, B AND C ARE SAME

AS MDA,B AND C IF THERE

IS NO SAMPLE/HOLD .

NOTE1 . MODE	PULSEINTERVAL
DC	65 ms
AC	915 ms
o l M	1 1 5m s
s , 1 0M	4 1 5m s

Figure4-4(b). MeasuibmentSequenceNotes.

configuration. At the sametime, FET switch N grounds the feedback capacitor. As a result, the capacitor is referenced to ground and the amplifier input is held at zero during the Auto Zero period. Any residualoffset in the amplifier is stored in the feedbackcapacitor. During the following measurement, the voltage stored in the capacitor appearsat the inverting input of the amplifier and cancelsthe amplifier offset.

discharged at a fixed rate determined by a known referencevoltage.Since the dischargerate is constant, the dischargetime is proportional to the amplitude of the charge (and the input signal). The Data Counter accumulatesthe number of clock pulsesreceivedduring the dischargetime, and this number is then displayedas the measurementamplitude. Figure 4-5 is a simplilied diagramof the Integrator circuits.

4.39.INTEGRATORCIRCUITS.

440. Dual-SlopeIntegration.

4-41. The 34904 usesthe dual,slopemethod of analog- todigital conversion. The integrator chargesfor a fixed period of time, as indicated in Figure 44. The charging rate and resultingamplitude of the chargeare propor- tional to the input signal. The integrator is then

442. IntegratingAmplifier.

443.Tl'reoutput of the DC Amplifier is applied to the Integrator through the FET switch at its input only during run-up and run-down. The Integating Amplifier is inverting, so if, for example, the input voltage is positive during run-up, the integrator output ramp is negative.

4-5