R e p l a c e A I U ' 1 6 w i r h known good Frt. Switch cnges and lunctions, obs e r v a n g d e c i m a l p o i n l . Should correspond to Enge.

Return to GeneralTrouble- shooting Tree, Figure 7-4.

SEE NOTE 1. Monitor Din

SEE NOTE 1. M@sure rcttage ar pin 2 ot A'U12. Should b€ < + 0.5 V.

'1.

SEE NOTE Monitor iig- nal at baseof A101. Corect wave{orm:

SEE NOTE 1. N/leasure rcltage at pin 2 of 41u8.

S h o u l d b e > + 3 V .

Measure voltagB at pins 5 l 0 o f A 1 U 8 . P i n 5 s h o u l db e . 5 . 7 V , p i n l 0 be + 12 V. Toler-

SEE NOTE 1. Measur€ rcltage ar pin 1 of A1u6. Shquld be > + 2.7 V.

Reter to Logic Trouble- shootingsuggestionsin Paragraph 7-39.

and 7 o{ A1U8. Both pi

n.fer to Logic Trouble-

eooting suggestionsin Part h r o u q h A 1 C R 2 ,R e p l a c e4 1 C R 1 . 3 ,

4.a3h 7-3g.

Figure7-10. Logic Clock TroubleshootingTree.
7-2317-)1