Model3490A

SectionIV

 

the same data lines. For this reasona standardcable (which may be variouslengths)is usedto connecteach instrument to the bus. The cable contains eight data linesand sevencontrol lines.

4201.BasicTheoryofGPIBl/0 Circuits.4-202.The3490AGPIBcircuitsemploytwo separate

logic systemscalled Algorithmic Siate Machines(ASM).

Abrief explanation of an Algorithmic State Machine is given in Parugraph4-90. One ASM is inside the instru- ment guard (Inguard State Machine) and the other is outside the guard (Outguard State Machine). Each system must accept, store, and output information, providing a two-way communication link between the 3490A internal logic circuits and the other bus system instruments. The two State Machines are timed by separatefree-runningclocks;consequently,communica- tion betweenthe two machinesis asynchronousFigure. 736 is a block diagramof the GPIB I/O circuits. Table 3-5 lists the bussignalmnemonics.

4-203. Information is transferred acrossguard from one ASM to the other by meansof photo-transistors,so that there is no electrical contact between inzuard and outguard circuits. This allows the inguardanä'outguard circuits to operate on different ground systems at different potentials. The outguard ASM receives and interprets information from the controller. It then responds to the controller, and transfers the necessary information across guard to the inguard ASM, which programs the 3490A logic circuits. Whenthe instrument is addressedto talk, the measurementoutput data is transferred acrossguard one digit or characterat a time. P11uIr then placedon the bus data lines DIOI through DI07 one character at a time in the sequenceshown in

Paragaph 3-126. Tlre timing of the data output is controlled by the three "handshake" sigrals describedin

Paragraphs3-94 through 3-97.

4-204.GPIBSystemOperation.

4-2-O!.Reset. When power is first applied to the 3490A, the Reset circuit output is LOW for approximately 100 ms. This setsthe inguard ASM to the-,izero,' state,.and sets the range and function circuits to the front panel settings.It also clearsthe Sample/Hold and Remote storageflip-flops and the trigger mode, causing all programming to conform to the fiönt panel settingsl The outguard ASM circuits then check io see if the 3490A logic circuits indicate that the instrument is in

remote control. If not, the instrumentcontinuesto be controlledfrom the front panel.

+246. Local Control. In local control, the I/O circuits accept and store range and function information from

the front panel.SampleRate and Sample/Hold(option_ al) are controlled from the front panel.-Thisinformation

may be updated at any time by changingthe control s€ttings.If the SampleRate control ls setto HOLD, the

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3490A may be triggered through the rear panel Trigger connector.If addressedto talk, the 3490A will output measurement data in accordance with normal bus

operation.

4-2O7.Address to Listen. When the Outguard State Machine sensesthat the MRE line is LOW, it waits for

DAV to go LOW indicating that the data information is valid. When LDAV is received,data lines DI05 through DIOI are comparedto the 34904 addressbits. If thöv

match, DI07 is checkedto determineif the addressis tä talk or to listen. If DI07 is HIGH, the 3490A is addressedto listen. It then checksREN to seeif it is

LOW. If so, the internal RMT line is set LOW and this information is transferred acrossguard and the Inguard

State Machine sets the 3490A to remote control, disablingthe front panel range,function, and Samplef Hold controls. As soon as the addressdataand tn, fiBN line havebeenchecked,the DAC output is allowedto go HIGH, indicatingthat the datahasbeenaccepted.

4-208. Remote Programming.After the 3490A has been instructed to listen and placedin remote control. the controller sets MRE High so that the 3490A can receiveremote programdata. This data is placedon the sevendatalinesDI0l -7by the controller,one character at a time. After each characteris placed on the data lines, the controller setsDAV to LOW,indicatingto the 349OA Outguard State Machinethat this data iJ readv. The OutguardStateMachinechecksto seeif the datals

valid for the 3490A and then transfersthe data across guardto the InguardStateMachine.It alsosetsthe DAC

line HIGH and RFD LOW to indicate that the data has 99rl acceptedand is beingprocessedThe. InguardState Machine then interprets the data and takesappropriate action. For example, if the characterreceivedis the alphaidentifier R, the inguardcircuitsaresetso that the

next character(if it is a digit) is routed to the ranse storage circuit. (See Paragraph3-106 for the ..rnol. programmingsequence.)After a datacharacterhasbeen

'iprocessed,RFD is allowedto go HIGH, ind"icatingto the controllerthat the 3490A is readyfor new data.

4-209. When programmingis completed,the controller must send the ASCII code characterE, after which it

may addressthe 34904 to talk or it may addressanv other unit on the bus to listenor talk. The character6

indicatesto the 3490A that the progamming is ended. The 3490A then will not accept any more data until after MRE has againbeensetLOW and the 3490A listen addresssent.

4-210. Addressto Talk. When the 3490A is addressed to talk, it outputs the measurementdata in the format shown in Paragraph 3-126. The output sequence is controlled by the Inguard State Machine tlirough a multiplexer and a storageunit. As each output data character is transferred across guard, the öutguard circuits place this character on the data lines and set

DAV to LOW, indicating to the listener that valid data is available.When the listener setsDAC HIGH, indicating

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