Intel 315889-002 manual 3.3Differential Remote Sense VO SEN+ REQUIRED

Control Signals

Table 3-4. VR 11.0 Voltage Identification (VID) Table

Note: Only VID [6.0] are used for VRM/EVRD 11.0 platforms. The eighth VID bit is provisional for future Itanium-based platforms.

3.3Differential Remote Sense (VO_SEN+/-) -

REQUIRED

The PWM controller shall include differential sense inputs to compensate for an output voltage offset of less than 300 mV in the power distribution path. This common mode voltage is expected to occur due to transient currents and parasitic inductances and is not expected to be caused by parasitic resistances.

It’s recommended that the remote sense lines’ current draw will not push the actual Load Line outside of the Load Line limits shown in Table 2-3. As a practical guideline to minimizing offset errors, it is recommended that the combination of the sense resistor values and the remote sense current draw will result in the total DC voltage offset <= 2 mV.

Note: VCC_DIE_SENSE, VSS_DIE_SENSE, VCC_DIE_SENSE2 and VSS_DIE_SENSE2 of the processor pins

are to be used as the VR sense input.

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