Output Voltage Requirements
3.See Section 2.5 and Table
Table
Processor | ZLL 1 | ZLLMax 2 | ZLLMin 3 | Fbreak | Notes |
1.25 mΩ | 1.45 mΩ | 1.05 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.511 mΩ | 0.989 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.583 mΩ | 0.917 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.583 mΩ | 0.92 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.917 mΩ | 0.583 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.49 mΩ | 1.01 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.583 mΩ | 0.917 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.750 mΩ | 0.750 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.583 mΩ | 0.917 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.673 mΩ | 0.827 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.850 mΩ | 0.650 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.450 mΩ | 1.050 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.490 mΩ | 1.010 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.544 mΩ | 0.956 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.750 mΩ | 0.750 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.481 mΩ | 1.019 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.583 mΩ | 0.917 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.583 mΩ | 0.917 mΩ | 2.0 MHz |
| |
1.25 mΩ | 1.750 mΩ | 0.750 mΩ | 2.0 MHz |
|
Notes:
1.ZLL is the target impedance for each processor and Z(f) value coincides with it’s Load Line slope.
2.ZLLMAX is the max allowed ZLL tolerance, which still fits within the VccMax and VccMin Load Line limits listed in Table
3.ZLLMIN is the min allowed ZLL tolerance, which still fits within the VccMax and VccMin Load Line limits listed in Table
2.6Stability - REQUIRED
The VRM/EVRD needs to be unconditionally stable under all specified output voltage ranges, current transients of any duty cycle, and repetition rates of up to 2 MHz. The VRM/EVRD should also be stable under a no load condition.
2.7Processor Power Sequencing - REQUIRED
The VRM/EVRD must support platforms with defined
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