Output Voltage Requirements
Table 2-2. Icc Guidelines
| Processor | ICCTDC | ICCMAX | ICCSTEP | Notes |
| (A) | (A) | (A) |
| | |
| | | | | |
| Dual-Core Intel® Xeon® processor 7000 sequence FMB | 130 | 150 | 100 | 1, 2 |
| Dual-Core Intel® Xeon® 7100 series processor FMB | 115 | 135 | 100 | 1, 2 |
| Dual-Core Intel® Xeon® Processor 5000 Series FMB | 130 | 150 | 90 | 1, 2 |
| Dual-Core Intel® Xeon® Processor 5000 Series MV/667 FMB | 100 | 115 | 76 | 1, 2 |
| Dual-Core Intel® Xeon® Processor X5160 Series Performance FMB | 70 | 90 | 40 | 1, 2 |
| Dual-Core Intel® Xeon® Processor E5100 Series FMB | 65 | 75 | 30 | 1, 2 |
| Dual-Core Intel® Xeon® Processor L5148/5138/5128 Series FMB | 35 | 45 | 25 | 1, 2 |
| Quad-Core Intel® Xeon® processor X5300 Series Performance FMB | 110 | 125 | 70 | 1, 2 |
| Quad-Core Intel® Xeon® processor E5300 Series FMB | 70 | 90 | 50 | 1, 2 |
| Quad-Core Intel® Xeon® processor L5300 Series-LV FMB | 50 | 60 | 35 | 1, 2 |
| Dual-Core Intel® Xeon® Processor X5200 Series | 70 | 90 | 37 | 1, 2 |
| Dual-Core Intel® Xeon® Processor E5200 ( | 60 | 75 | 21 | 1, 2 |
| Dual-Core Intel® Xeon® Processor L5200 Series | 38 | 50 | 36 | 1, 2 |
| Quad-Core Intel® Xeon® Processor X5482 | 130 | 150 | 67 | 1, 2 |
| Quad-Core Intel® Xeon® Processor X5400 Series | 110 | 125 | 68 | 1, 2 |
| Quad-Core Intel® Xeon® Processor E5400 Series | 80 | 102 | 65 | 1, 2 |
| Quad-Core Intel® Xeon® Processor L5400 Series | 50 | 60 | 60 | 1, 2 |
| Quad-Core Intel® Xeon® Processor X7300 Series | 110 | 130 | 78 | 1, 2 |
| Quad-Core Intel® Xeon® Processor E7300 Series | 75 | 90 | 72 | 1, 2 |
| Dual-Core Intel® Xeon® Processor 7200 Series | 75 | 90 | 72 | 1, 2 |
| Quad-Core Intel® Xeon® Processor L7300 Series | 50 | 60 | 54 | 1, 2 |
Notes:
1.These values are either pre-silicon or the latest known values and are subject to change. See the respective Processor’s Electrical, Mechanical, and Thermal Specifications (EMTS) for the latest IccTDC and IccMAX specifications.
2.FMB = Planned Flexible Motherboard guideline for processor end-of-life.
3.Voltage regulator thermal protection circuitry should not trip for load currents greater than ICCTDC
4.For platforms designed to support several processors, the highest current value should be used.
5.For platforms designed to support a single specific processor, only use that processor’s current requirements.
2.2Load Line Definitions - REQUIRED
To ensure processor reliability and performance, platform DC and AC transient voltage regulation must be contained within the VCCMIN and the VCCMAX die load line boundaries, except for short burst transients above the VCCMAX as specified in Section 2.4. Die load line compliance must be guaranteed across 3-sigma component manufacturing tolerances, thermal variation and age degradation. The following load line contains static and transient voltage regulation data as well as maximum and minimum voltage levels. It is required that the regulator’s positive and negative differential remote sense pins be connected to both the VCC_DIE_SENSE, VSS_DIE_SENSE, VCC_DIE_SENSE2 and VSS_DIE_SENSE2 pin pairs of the processor socket, see Figure 3-1. The prefix VCC is designated for the positive remote sense signal and the VSS prefix for the negative remote sense signal.
