Intel 315889-002 manual 6.3Load Indicator Output Load Current PROPOSED, 3.VRM pres# Specifications

Output Indicators

to the FORCEPR# pin or through system management logic. Assertion of this signal will lower processor power consumption and reduce current draw through the voltage regulator, resulting in lower component temperatures. Sustained assertion of the FORCEPR# pin will cause noticeable platform performance degradation and should not occur when drawing less than the specified thermal design current for a properly designed system.

It is recommended that hysteresis be designed into the thermal sense circuit to prevent a scenario in which the VR_hot# signal is rapidly being asserted and de-asserted.

6.3Load Indicator Output (Load_Current) -

PROPOSED

The VRM/EVRD may have an output with a voltage (Load_Current) level that varies linearly with the VRM/EVRD output current. The PWM controller supplier may specify a voltage-current relationship consistent with the controller’s current sensing method. Baseboard designers may route this output to a test point for system validation.

6.4VRM Present (VRM_pres#) - EXPECTED

The VRM should have the VRM_pres# signal. This signal is an output signal used to indicate to the system that a VRM 10.x compatible module is plugged into the socket. VRM_pres# is an open-collector/drain or equivalent signal. Table 6-3shows the VRM_pres# pin specification. It is EXPECTED that the pull-up resistor will be located on the baseboard and will not be integrated into the VRM.

Table 6-3. VRM_pres# Specifications

Symbol	Parameter	Min	Max	Units
IOL	Output Low Current	0	4	mA
VOH	Output High Voltage	0.8	5.5	V
VOL	Output Low Voltage	0	0.4	V

6.5VR_Identification (VR_ID#) - EXPECTED

The VRM should have the VR_ID# signal. This signal is an output signal used to indicate to the system that a VR11-compatible VRM is plugged into the socket.

VR_ID# is an open-collector/drain or equivalent signal. Table 6-4shows the VR_ID# pin specification. It is EXPECTED that the pull-up resistor will be located on the baseboard and will not be integrated into the VRM.

The VR_ID# signal combined with the VRM_pres# signal forms a two-bit VRM identification code to indicate the type of module installed in a system. Figure 6-1defines the two signal decode.

Table 6-4. VRM_ID# Specifications

	Symbol	Parameter	Min	Max	Units
	IOL	Output Low Current	0	4	mA
	VOH	Output High Voltage	0.8	5.5	V
	VOL	Output Low Voltage	0	0.4	V
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