Intel 315889-002 manual layers, 2 power, 2 ground, 2 signal, 1 oz Cu

Output Voltage Requirements

Note: The amount of bulk decoupling needed is dependent on the voltage regulator design. Some multiphase buck regulators may have a higher switching frequency that would require a different output decoupling solution to meet the processor load line requirements than described in this document.

Table 2-7. Dual-Core Intel Xeon Processor-Based Server/Dual-Core Intel Xeon Processor-Based Server-VS/Dual-Core Intel Xeon Processor-Based Workstation Platform Processor Decoupling Capacitor Recommendations

6 layers, (2 power, 2 ground, 2 signal), 1 oz Cu

Quantity	Value	Tolerance	Temperature	ESR	ESL	Notes
			Coefficient	(mΩ)	(nH)
15	560 µF Al-Polymer	±20%	NA	7	4
35	10 µF 1206 Ceramic	±20%	X5R or X6S	3	1.2
9	10 µF 1206 Ceramic	±20%	X6S	3	1.2	1
	8 layers, (3 power, 3 ground, 2 signal), 1 oz Cu
Quantity	Value	Tolerance	Temperature	ESR	ESL	Notes
			Coefficient	(mΩ)	(nH)
13	560 µF Al-Polymer	±20%	NA	7	4
35	10 µF 1206 Ceramic	±20%	X5R or X6S	3	1.2
9	10 µF 1206 Ceramic	±20%	X6S	3	1.2	1
	8 layers, (3 power, 3 ground, 2 signal), 1 oz Cu
Quantity	Value	Tolerance	Temperature	ESR	ESL	Notes
			Coefficient	(mΩ)	(nH)
17	560 µF Al-Polymer	±20%	NA	7	4
45	10 µF 0805 Ceramic	±20%	X5R or X6S	10	1.1
9	10 µF 0805 Ceramic	±20%	X6S	10	1.1	1

Notes:

1.Only the decoupling caps inside the socket cavity need to have the temperature coefficient of “X6S”.

Table 2-9. Dual-Core Intel Xeon 7000 Series with Intel 7300 Chipsets Platform Processor Decoupling Capacitor Recommendations

Quantity	Value / Description	ESR	ESL	Notes
		(mΩ)	(nH)
18	560µF/2.5V/20%/ Oscon	6.3	3.2
65	22µF/6.3V/20%/ X5R /1206 MLCC	4	0.52

Notes: Dual-Core Intel Xeon 7000 Series processors with Intel 7300 Chipsets baseboard has 14-layers. Refer to the latest Dual-Core Intel Xeon 7000 Series processors with Intel 7300 Chipsets Platform Design Guide for baseboard stack-up details.

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