Intel manual Split Voltage Planes, 41210 Bridge Decoupling Guidelines, Power Plane Layout

Power Plane Layout

Table 2. 41210 Bridge Decoupling Guidelines

Voltage Plane	Voltage	41210	C	Package	ESR	ESL	# of	Location
		Pins	(uF)		(mΩ )	(nH)	Caps
PCI/PCI-X	3.3V	VCC33	0.1	0603	50-	1.0-	5	Beneath 41210
Voltage					300	3.0		Bridge BGA
PCI/PCI-X	3.3V	VCC33			50-	1.0-		As close as design
			1.0	0603			2	rules will allow to
Voltage					300	3.0
								41210 Bridge BGA
PCI/PCI-X	3.3V	VCC33			50-	1.0-		As close as design
			10	1206			3	rules will allow to
Voltage					300	3.0
								41210 Bridge BGA
Core Voltage	1.5V	VCC15	0.1	0603	200	2.0	5	Beneath 41210
								Bridge BGA
Core Voltage	1.5V	VCC15						As close as design
			1.0	0805	200	2.3	5	rules will allow to
								41210 Bridge BGA
Core Voltage	1.5V	VCC15						As close as design
			10	1206	200	1.9	2	rules will allow to
								41210 Bridge BGA
PCI Express	1.5V	VCCPE	0.1	0603	200	2.0	3	Beneath 41210
Voltage								Bridge BGA
PCI Express	1.5V	VCCPE						As close as design
			1	0805	200	2.3	4	rules will allow to
Voltage
								41210 Bridge BGA
PCI Express	1.5V	VCCPE						As close as design
			10	1206	200	1.9	2	rules will allow to
Voltage
								41210 Bridge BGA

4.2Split Voltage Planes

There are two 1.5V voltage planes that supply power to the 41210 Bridge:

•VCC15:1.5V ±5% (1.5V core voltage)

•VCCPE:1.5V ±3% (1.5V PCI Express voltage)

The 41210 Bridge core (VCC15), PCI-Express (VCCPE) voltages should be supplied by two separate voltage regulators or a single regulator. If VCC15 and VCCPE is supplied by a single voltage regulator the power planes should be split as shown in Figure 10.

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 21