Bridge Customer Reference Boards, Board Stack-up | Intel 41210

41210 Bridge Customer Reference	11
Boards

This chapter describes the 41210 Bridge Customer Reference Board (CRB).

11.1Board Stack-up

The proposed layout of the PCB is eight layers with the following stackup:

•Signal #1 (Top/Component Side)

•Ground Plane: GND

•Signal #2

•Power Plane

•Power Plane

•Signal #3

•Ground Plane

•Signal #4 (Bottom)

The permittivity constant Er = 4.5

Intel® 41210 Serial to Parallel PCI Bridge Design Guide

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Intel 41210 manual Bridge Customer Reference Boards, Board Stack-up

Contents

Design Guide Intel 41210 Serial to Parallel PCI Bridge Intel 41210 Serial to Parallel PCI Bridge Design Guide Contents Figures Revision History TablesDescription This page intentionally left blank Term Definition About This DocumentTerminology and Definitions Terminology and Definitions Sheet 1 Terminology and Definitions Sheet 2 About This Document PCI-X Interface Features PCI Express Interface FeaturesIntroduction2 Introduction Power ManagementSMBus for configuration register initialization SMBus Interface Microcontroller Connections to the 41210 Bridge Bridge Microcontroller Block Diagram Related Documents Jtag Intel41210 Serial to Parallel PCI Bridge Applications Intel 41210 Bridge Adapter Card Block Diagram This page intentionally left blank Package Information Package Specification Package Information Bottom View 41210 Bridge 567-Ball Fcbga Package Dimensions Side View 41210 Bridge 567-Ball Fcbga Package Dimensions This page intentionally left blank 41210 Bridge Decoupling Guidelines Power Plane Layout Power Plane Layout Bridge Decoupling Guidelines Split Voltage Planes PCI ARST#,BRST# and PERST# Timing Requirements Bridge Reset and Power Timing Considerations5VCC15 and VCC33 Voltage Requirements Bridge Reset and Power Timing Considerations General Routing Guidelines General Routing GuidelinesCrosstalk General Routing Guidelines EMI Considerations Trace Impedance Power Distribution and DecouplingDecoupling Cross Section of Differential Trace Differential Impedance Adapter Card Topology Board Layout GuidelinesAdapter Card Stack Up, Microstrip and Stripline Adapter Card Stackup Board Layout Guidelines Interrupts PCI-X Layout GuidelinesINTx Routing Table Interrupt Binding for Devices Behind a Bridge PCI ArbitrationInterrupt Routing for Devices Behind a Bridge PCI-X Layout Guidelines PCI Resistor Compensation PCI General Layout Guidelines PCI Pullup Resistors Not Required PCI-X SignalsPCI/PCI-X Frequency/Mode Straps BCBE#74, BDEVSEL#, BFRAME#, BINTA#, BINTB#, BINTC#, BINTD# PCI Clock Layout Guidelines PCI Clock Distribution and Matching Requirements Parameter Routing Guidelines PCI-X Clock Layout Requirements Summary PCI-X Slot Guidelines PCI-X Topology Layout Guidelines Embedded PCI-X 133 MHz Routing Recommendations Embedded PCI-X 133 MHzParameter Routing Guideline for Lower AD Bus Embedded PCI-X 100 MHz Routing Recommendations Embedded PCI-X 100 MHz PCI-X 66 MHz Embedded Routing Recommendations PCI-X 66 MHz Embedded Topology PCI 66 MHz Embedded Table PCI 66 MHz Embedded Topology PCI 33 MHz Embedded Routing Recommendations PCI 33 MHz Embedded Mode Topology This page intentionally left blank General recommendations PCI Express Layout Adapter Card Routing Recommendations Sheet 1 PCI-Express Layout GuidelinesAdapter Card Layout Guidelines PCI Express Layout Adapter Card Routing Recommendations Sheet 2 This page intentionally left blank Circuit Implementations Config10.1 41210 Bridge Analog Voltage Filters PCI Express Analog Voltage Filter PCI Analog Voltage FiltersCircuit Implementations Vccape Bandgap Analog Voltage FilterVssape Vccbgpe Bandgap Analog Voltage Filter CircuitVSS Vssbgpe PERCOMP0 PERCOMP1 Rcomp Reference and Compensation Circuit Implementations SM Bus SMBUs Address ConfigurationBit Value Board Stack-up Bridge Customer Reference Boards Bridge Customer Reference Boards Layer Type Thickness Copper WeightMaterial Impedance Mechanical Outline of the 41210 Bridge Board Outline This page intentionally left blank PERCOMP10 Design Guide ChecklistPCI Express Interface Signals Signals Recommendations Reason/Impact PCI/PCI-X Interface Signals Design Guide Checklist Bpcixcap AM66ENBM66EN PERST# Apcixcap SMBus Interface Signals Miscellaneous SignalsSignals VCC33 Power and Ground SignalsSignal Recommendations Reason/Impact VCC15 Jtag Signals