7521Plus / N N/B MAINTENANCE
By integrating the UltraAGP TM technology and advanced 64-bit graphic display interface, SiS630S delivers AGP 4x performance and memory bandwidth of up to 1 GB/s. In addition, SiS also supports an extra AGP Slot that supports 4X and Fast Write transactions. Furthermore, SiS630S provides powerful hardware decoding DVD accelerator to improve the DVD playback performance. In addition to providing the standard interface for CRT monitors, SiS630S also provides the Digital Flat Panel Port (DFP) for a standard interface between a personal computer and a digital flat panel monitor. To extend functionality and flexibility, SiS also provides the “ Video Bridge ” (SiS301) to support the NTSC/PAL Video Output, Digital LCD Monitor and Secondary CRT Monitor, which reduces the external Panel Link transmitter and TV-Out encoder for cost effected solution. SiS630S adopts Share System Memory Architecture which can flexibly utilize the frame buffer size up to 64MB.
The “ Super-South Bridge “ in SiS630S integrates all peripheral controllers/accelerators /interfaces. SiS630S provides a total communication solution including 10/100Mb Fast Ethernet for Office requirement and 1Mb HomePNA for Home Networking. SiS630S offers AC’7 compliant interface that comprises digital audio engine with 3D-hardware accelerator, on-chip sample rate converter, and professional wavetable along with separate modem DMA controller. SiS630S also provides interface to Low Pin Count (LPC) operating at 33 MHz clock which is the same as PCI clock on the host, and dual USB host controllers with six USB ports that deliver better connectivity and 2 x 12Mb bandwidth.
The built-in fast PCI IDE controller supports the ATA PIO/DMA, and the Ultra DMA33/66/100 function that supports the data transfer rate up to 100 MB/s. It provides the separate data path for two IDE channels that can eminently improve the performance under the multi-tasking environment.
SiS630S Features
Host Interface Controller
Supports Intel Slot 1/Socket370 Pentium II/!!! CPUs
Synchronous Host/DRAM Clock Scheme
Asynchronous Host/Dram Clock Scheme
