MiTAC 7521 PLUS/N service manual VID40

7521Plus / N N/B MAINTENANCE

5. Pin Descriptions Of Major Components

5.1 Pentium III/Celeron FC-PGA2 CPU

PWRGOOD Relationship at Power On

Signal Name	I/O	Signal Description
VID[4:0]	O -	The VID[4:0] (Voltage ID) pins/balls can be used to support
	Open-	automatic selection of power supply voltages. These pins/balls are not
	drain	signals, they are either an open circuit or a short to VSS on the
		processor substrate. The combination of opens and shorts encodes the
		voltage required by the processor. External to pull-ups are required to
		sense the encoded VID. For processors that have Intel SpeedStep
		technology enabled, VID[4:0] encode the voltage required in the
		battery-optimized mode. VID[4:0] are needed to cleanly support
		voltage specification changes on mobile Pentium III processors. The
		voltage encoded by VID[4:0] is defined in Table 39. A "1" in this
		table refers to an open pin/ball and a "0" refers to a short to VSS. The
		power supply must provide the requested voltage or disable itself.
		Please note that in order to implement VID on the BGA2 package,
		some VID[4:0] balls may be depopulated. For the BGA2 package, a
		"1" in Table 39 implies that the corresponding VID ball is
		depopulated, while a "0" implies that the corresponding VID ball is
		not depopulated.
		But on the Micro-PGA2 package, VID[4:0] pins are not depopulated.

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