MiTAC 8399 manual 155

5 4 3 2

+3VS	+2.5V	SB VIA_VT8235CD (2/3)	1	1
			+3VS +3V	+3V

1

+VCC_RTC

D

C

B

A

13 IDE_PDD[0..15]		IDE_PDD[0..15]
			IDE_PDD0	AA24
			IDE_PDD1	AA25
			IDE_PDD2	AB24
			IDE_PDD3	AC26
			IDE_PDD4	AC24
			IDE_PDD5	AD25
			IDE_PDD6	AE26
			IDE_PDD7	AF25
			IDE_PDD8	AF26
			IDE_PDD9	AD24
			IDE_PDD10	AD26
			IDE_PDD11	AC25
			IDE_PDD12	AB23
			IDE_PDD13	AB26
			IDE_PDD14	AA26
			IDE_PDD15	AA22
13 IDE_PDDREQ				Y22
13 IDE_PDDACK#				W26
				Y24
13	IDE_PDIOR#
				Y25
13 IDE_PDIOW#
				Y26
13	IDE_PIORDY
13	IDE_PDCS1#			V24
				W24
13	IDE_PDCS3#
				Y23
13	IDE_PDA0
				V25
13	IDE_PDA1
				V26
13	IDE_PDA2
13	IDE_IRQ14			AE24
			PVREF	W22
			PCOMPP	W23
13,17 IDE_SDD[0..15]		IDE_SDD[0..15]	IDE_SDD0
				AF15
			IDE_SDD1	AD16
			IDE_SDD2	AF16
			IDE_SDD3	AF17
			IDE_SDD4	AE17
			IDE_SDD5	AD18
			IDE_SDD6	AF18
			IDE_SDD7	AE18
			IDE_SDD8	AF19
			IDE_SDD9	AD19
			IDE_SDD10	AD20
			IDE_SDD11	AF20
			IDE_SDD12	AE20
			IDE_SDD13	AD21
			IDE_SDD14	AF21
			IDE_SDD15	AE21
13 IDE_SDDREQ				AE15
13 IDE_SDDACK#				AD22
				AF22
13	IDE_SDIOR#
				AC21
13 IDE_SDIOW#
				AD15
13	IDE_SIORDY		SDCS1#
				AC23
13	IDE_SDCS1#
			SDCS3#	AD23
13	IDE_SDCS3#
			SDA0	AE23
13		IDE_SDA0
			SDA1	AC22
13		IDE_SDA1
			SDA2	AF23
	13	IDE_SDA2
				AF24
13		IDE_IRQ15
			SVREF	AD17
			SCOMPP	AC15

GPI0	VCC_RTC	RESERVE	PINOUT
			AE3
GPI1	+3VS	RESERVE	AC3
GPI2	+3VS	EXTSMI#	AA1
GPI3	+3VS	VAKE_UP#	Y2
GPI4	+3VS	MII_PWRDWN	AC1
GPI5	+3VS	PME#	W4
GPI6	+3V	SCI#	A8
GPI7	+3V	RESERVE	N4
GPI16	VCC_RTC	RESERVE	AD3
GPI17	+3V	LCD_ID0	Y1
GPI18	+3V	THRM#	Y4
GPI19	+3V	LCD_ID1	AD10
GPO0	+3VS	RESERVE	AA3
GPO1	+3VS	SUSA#	AA2
GPO2	+3VS	SUSB#	AF2
GPO3	+3VS	SB_SUSST#	Y3
GPO4	+3VS	RESERVE	AB1
GPO5	+3V	RESERVE	AC7
GPO6	+3V	RESERVE	AF6
GPO7	+3V	SB_SLP#	P4
GPO16		SEE STRAP TABLE	AF11
GPO17		SEE STRAP TABLE	AE11
GPO18		SEE STRAP TABLE	AD11
GPO19		SEE STRAP TABLE	AC11
GPIO8	+3V	MB_ID0	C8
GPIO9	+3V	MB_ID1	B7
GPIO10	+3V	KBD_CS0	D7
GPIO11	+3V	KBD_CS1	A6
GPIO12	+3V	RESERVE	A7
GPIO13	+3V	RESERVE	B8
GPIO14	+3V	ENBL_SB	D8
GPIO15	+3V	MPCIACT#	C7
GPIO20	+3V	RESERVE	U2
GPIO21	+3V	RESERVE	V1
GPIO22	+3V	SB_GHI#	R24
GPIO23	+3V	RESERVE	P26
GPIO24	+3V	SPKR_MUTE#	AE5
GPIO25	+3V	RESERVE	AE6
GPIO26	+3VS	RESERVE	AD1
GPIO27	+3VS	RESERVE	AE1
GPIO28	+3V	AGP_8X#	P25
GPIO29	+3V	RESERVE	P24
GPIO30	+3V	CRT_IN#	AD6
GPIO31	+3V	MINIPCI_PD	AC6
		5

R324

R329

F14 F10 F9 F15 H5 J5 J21 K5 K21 T5 T21 U5 U21 U22 V5 AB8 AB9 AB16 AB17

10K

10K

AA4 AB4 AC4 AC5

0402

G

0402

2

2

U20B

5%

5%

SMBCLK1

PDD2 VSUS33VSUS33VSUS33VSUS33

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

ACSDIN1

T3

ACSDIN2

MDC_SDIN

15,16

D

S

S

SMB_CLK0

4,5

U2

PDD0

ACBITCLK

T2

AC97_BITCLK 15,16,18

D

PDD1

ACSDIN0

U3

AC97_SDIN

18

Q35

2N7002

PDD3

ACSDIN2/GPI20/GPO20

V1

ACSDIN3

PDD4

ACSDIN3/GPI21/GPO20

T1

R304

1

22

2

0402

AC97_SYNC

15,16,18

PDD5

ACSYNC

U1

R305

1

22

2

0402

PDD6

ACSDO

AC97_SDOUT

15,16,18

R3

R300

1

22

2

0402

PDD7

ACRST#

AC97_RST# 15,16,18

PDD8

PDD9

PWROK#

AE2

PWROK#

R301

1

0/NA5% 2 0402

PDD10

AF4

PWROK_SB

3,7,20

PDD11

PWRGD

PDD12

PWRBTN#

AD2

SB_PWRBTN# 19

AD5

PDD13

RSMRST#

WAKE_UP#

RSMRST# 19

+3VS

+3V

+3V

Y2

PDD14

RING#/GPI3

WAKE_UP#

19

AA1

EXTSMI#

PDD15

EXTSMI#/GPI2

EXTSMI# 19

W3

SCI#

PME#/GPI6

SCI#

19

1

1

AC1

GPI4

PDDREQ

LID#/GPI4

MII_PWRDWN 16

W4

PME#

R346

R344

PDDACK#

BATLOW#/GPI5

Y3

SUSST1#

SUSST1# 7

10K

10K

PDIOR#/PHDMARDY/PHSTROBE

SUSST1#/GPO3

AB1

SUSCLK

0402

G

0402

PDIOW#/PSTOP

SUSCLK/GPO4

5%

5%

PDRDY/PDDMARDY/PDSTROBE

2

2

PDCS1#

AA2

SUSA#

SUSA#

5

SMBDATA1

D

S

SMB_DATA0 4,5

PDCS3#

SUSA#/GPO1

AF2

SUSB#

D S

PDA0

SUSB#/GPO2

SUSB#

19,20,22

AF1

SUSC#

Q37

PDA1

SUSC#

SUSC#

19,21

AB2

GPI7

2N7002

PDA2

SMBALRT#/GPI7

AB3

SMBCLK1

IRQ14

SMBCK1

AC2

SMBDATA1

SMBDT1

PVREF

GPI1

AC3

GPI1

PCOMPP

AA3

GPO0

SB_GPO0 18

GPO0

GPI0

AE3

GPI0

SA0/SDD0

AE5

GPIO24

GPIOA/GPI24/GPO24

AE6

GPIO25

SA1/SDD1

GPIOC/GPI25/GPO25

AD6

GPIO30

CRT_IN#

11

SA2/SDD2

GPIOD/GPI30/GPO30

AC6

GPIO31

+3VS

+3V

+3V

SA3/SDD3

GPIOE/GPI31/GPO31

MINIPCI_PD

15

SA4/SDD4

AF5

CLKRUN#

CLKRUN#

14,15

1

2

1

SA5/SDD5

PCLKRUN#

AC7

GPO5

SA6/SDD6

CPUSTP#/GPO5

AF6

GPO6

1

R311

R326

SA7/SDD7

GND

DocGPIO31 4 ument7 IOR#

PCISTP#/GPO6

TP8

10K

10K/NA

SA8/SDD8

0402

R1

0402

SA9/SDD9

MEMR#

AE12

ISA_MEMR# 17

5%

5%

SA10/SDD10

AF10

PME#

2

3

1

2

SA11/SDD11

MEMW#

AF12

ISA_ROMCS#

ISA_MEMW# 17

MPCI_PME#

14,15

SA12/SDD12

ROMCS#/KBCS#

AD12

ISA_SOE#

ISA_ROMCS# 17

Q34

SA13/SDD13

SOE#

AC10

IOR#

ISA_SOE# 17

DTC144TKA/NA

CARD_PME#

14,15

SA14/SDD14

IOR#/GPI22/GPO22

AD9

IOW#

AGP_PME# 14,15

SA15/SDD15

IOW#/GPI23/GPO23

AF9

TESTB

TEST

AD10

GPI19

LCD_ID1

12

SDDRQ

IORDY#/GPI19

SDDACK#

SA16/GPO16

AF11

SA16

ISA_SA16

17

SDIOR#/SHDMARDY/SHSTROBE

AE11

SA17

+5V

+3VS

SDIOW#/SSTOP

SA17/GPO17

AD11

SA18

ISA_SA17

17

SDRDY/SDDMARDY/SDSTROBE

SA18/GPO18

AC11

SA19

ISA_SA18

17

SDCS1#

SA19/GPO19

RP67

RP56

SDCS3#

XD0

AC14

ISA_SD0

ISA_SD0

17

ISA SD0

1

10

PWROK#

1

10

SDA0

AC13

ISA_SD1

ISA SD1

2

9

ISA SD4

WAKE UP#

2

9

GPI4

SDA1

XD1

ISA_SD1

17

AF14

ISA_SD2

ISA SD2

3

8

ISA SD5

EXTSMI#

3

8

SUSA#

SDA2

XD2

ISA_SD2

17

AE14

ISA_SD3

ISA SD3

4

7

ISA SD6

SCI#

4

7

SUSCLK

IRQ15

XD3

ISA_SD3

17

AD14

ISA_SD4

5

6

ISA SD7

5

6

GPO0

XD4

ISA_SD4

17

AF13

ISA SD5

SVREF

XD5

ISA SD5

17

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

AE13

ISA SD6

10K*8

1206

10K*8 1206

SCOMPP

XD7

ISA SD7

17

+3V

XD6

AD13

ISA SD7

ISA SD6

17

L12 L13 L14 L15 L16 L23 L25 M11 M12 M13 M14 M15 M16 N5 N11 N12 N13 N14 N15 N16 P11 F6 F11 AB25 AB22

Secret

VT8235

BGA451 36 1MM

GPIO24

RP65

1

10

GPIO25

2

9

GPO5

GPIO30

3

8

GPO6

5

6

IOW#

4.7K*8

1206

SA[17:16]==>LDT Frequency

ROMCS# ==> LPC I erface Select

SDCS1# ==> EEPEOM Select

SDCS3# ==> Test Mode Select

00 - 200MHz (Default) 10 - 600MHzM0iT- Disable acLPC

0 - BIOS Porting - ACR

0 - Disable (Default)

01 - 400MHz

11 - 800MHz

1 - Ensable LPC (Default)

1 - Exteral EEPROM (On-board)(Default)

1 - Ensable

+3V

+3V

+3VS

+3V

+3V

2

2

1

2

2

R359

R358

R362

R367

R365

2.7K/NA

2.7K/NA

10K/NA

2.7K

2.7K/NA

0603D

0603D

0603D

0603

0603D

1

1

2

1

1

SA16

SA17

ISA ROMCS#

SDCS1#

SDCS3#

2

2

1

2

2

R373

R372

R376

R381

R379

2.7K

2.7K

10K

2.7K/NA

2.7K

0603

0603

0603D

0603D

0603D

1

1

2

1

1

GND

GND

GND

GND

GND

SDA0 ==>ConfidSDA1 en==> tiaSDA2 l==> ROMSIP Select

SA[19]==>Fast command

SA[18]==>LDT Width

LDT Trasmit Timing control

Extermal loop test mode

0 - Disable (Default)

0 - Disable (Default)

0 - 8-Bit (Default)

0 - Disable (Default)

1 - Ensable

1 - Ensable

1 - 16-Bit

1 - Ensable

+3V

+3V

+3V

+3V

+3V

2

2

2

2

2

R360

R363

R380

R364

R361

2.7K/NA

2.7K/NA

2.7K/NA

2.7K

2.7K/NA

0603D

0603D

0603D

0603D

0603D

1

1

1

1

1

SDA0

SDA1

SDA2

SA19

SA18

2

2

2

2

2

R374

R377

R366

R378

R375

2.7K

2.7K/NA

2.7K/NA

2.7K

2.7K

0603

0603

0603

0603

0603

1

1

1

1

1

GND

GND

GND

GND

GND

4

3

2

		GPI0		R347	1	4.7K		2	0402
											+3VS
		GPI1		R332	1	4.7K		2	0402
		GPI7		R312	1	4.7K		2	0402
												D
											+3V
		GPI19		R322	1	10K		2	0402
		ISA_SOE#		R354	1	4.7K		2	0402
		SOE# ==> Auto Reboot Mode
		0 - Ensable
		1 - Dnsable(default)
			PCOMPP			R315	1	360 1% 2			0402
			SCOMPP			R350	1	360 1% 2			0402
			ACSDIN2			R302	1	4.7K		2	0402
			ACSDIN3			R299	1	4.7K		2	0402
			TESTB			R371	1	1K		5% 2	0402
											GND
												C
		+2.5V
		1	C393	1	C394		1		C334
			10U		0.1U				0.1U
			0805		0402				0402
		2	+80-20%	2	+80-20%2				+80-20%
						GND
		+3V
		1	C350	1		C349	1		C392
			10U			0.1U			0.1U			B
			0805			0402			0402
		2	+80-20% 2			+80-20%2			+80-20%
							GND
			+3V				+3V
			1				1
				R317						R351
				1K						1K
				0402						0402
			2	5%			2			5%
		PVREF				SVREF
			1				1
				R319						R352
				383						383
				0603						0603
			2				2
			GND				GND
												A
Title	<Title>
Size	Document											Rev
C		<Doc>										R00
	Number
Date:		星期四, 五月 20, 2004				Sheet				9	of	26
				1

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