8399 N/B Maintenance
5.3 VIA VT8235CD South Bridge(10)Power and Ground |
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Signal Name | Pin # | I/O |
VSUS33 | AA4, | P |
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VSUS25 | T4, U4 | P |
VSUSUSB | C24 | P |
VBAT | AF4 | P |
VLVREF | H22 | P |
VLCOMP | J22 | AI |
VCCVK | (see pin | P |
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MIIVCC | D9, | P |
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MIIVCC25 | D12. | P |
| E12 |
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LANVCC | E7 | P |
LANGND | E6 | P |
USBVCC | (see pin | P |
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USBGND | (see pin | P |
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VCCUPLL | A23, | P |
| B23 |
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GNDUPLL | C23, | P |
| D23 |
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PLLVCC | T22 | P |
PLLGND | U22 | P |
| Power and Ground(Continued) | |||
Signal Description | Signal Name | Pin # | I/O | Signal Description |
Suspend Power. 3.3V ±5%. Always available unless the | VCC33 | (see pin | P | I/O Power. 3.3V ±5% |
mechanical switch of the power supply is turned off. If the |
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VCC | (see pin | P | Core Power. 2.5V ±5%. This supply is turned on | |
connected to VCC33. Signals powered by or referenced to |
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| only when the mechanical switch on the power |
this plane are: PWRGD, RSMRST#, PWRBTN#, |
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| supply is turned on and the PWRON signal is |
SMBCK1/2, SMBDT1/2, GPO0, SUSA# / GPO1, SUSB# / |
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| conditioned high. |
GPO2, SUSC#, SUSST1# / GPO3, SUSCLK / GPO4, | GND | (see pin | P | Ground. Connect to primary motherboard ground plane. |
GPI1, GPI2 / EXTSMI#, GPI3 / RING#, GPI4 / LID, GPI5 |
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/ BATLOW#, GPI6 / PME#, SMBALRT# |
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Suspend Power. 2.5V ±5%. |
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USB Suspend Power. 2.5V ±5%. |
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RTC Battery. Battery input for internal RTC (RTCX1, |
| Strap Pins for North Bridge Configuration |
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RTCX2) |
| Signal Name | Pin # | Function | Description | Note | ||
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| SDCS3# | AF26 | NB | SDCS3# signal state is reflected on Check the | ||||
0.625V ±5% for 8x transfers. |
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| Configuratio | signal pinVD[7] during power up | NorthBridge DS | |||
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Document for North Bridgeconfiguration. | fordetails | |||||||
Confidential | SDA2 | AE24 | NB | SDA2 signal state is reflected on | Check the | |||
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LAN MII Power. 3.3V ±5%.Power for LAN Media |
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| Configuratio | signal pinVD[6] during power up | NorthBridge DS | ||
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| n | for North Bridgeconfiguration. | fordetails | |||
Independent Interface (interface to external PHY). Co nect |
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| SDA1 | AC22 | NB | SDA1 signal state is reflected on | Check the | |||
to VCC33 through a ferrite bead. |
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| Configuratio | signal pinVD[5] during power up | NorthBridge DS | |||
LAN MII Suspend Power. 2.5V ±5%. |
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| n | for North Bridgeconfiguration. | fordetails | |||
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LAN Power. 2.5V ±5%. Power or LAN. Connect to VCC |
| SDA0 | AF24 | NB | SDA0 signal states is reflected on | Check the | ||
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| Configuratio | signal pinsVD[4] during power up | NorthBridge DS | |||
through a ferrite bead. |
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| n | for North Bridgeconfiguration. | fordetails | |||
LAN Ground. Connect to GND through ferrite bead. |
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| Strap_VD3 | AC6 | NB | Strap_VD3 signal state is reflected | Check the | |||
USB 2.0 Differential Output Power. 3.3V ±5%. Power |
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| Configuratio | on signal pinVD[3] during power | NorthBridge DS | ||
for USB differential outputs (USBP0+, P0Œ, P1+, P1Œ, |
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| n | up for North Bridgeconfiguration. | fordetails | ||
P2+, P2Œ, P3+, P3Œ, P4+, P4Œ, P5+, P5Œ). Connect to |
| Strap_VD2 | AD5 | NB | Strap_VD2 signal state is reflected | Check the | ||
VSUS33 through a ferrite bead. |
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| Configuratio | on signal pinVD[2] during power | NorthBridge DS | ||
USB 2.0 Differential Output Ground. Connect to GND |
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| n | up for North Bridgeconfiguration. | fordetails | ||
through a ferrite bead. |
| Strap_VD1 | AE5 | NB | Strap_VD1 signal state is reflected | Check the North | ||
USB 2.0 PLL Analog Voltage. 2.5V ±5%. Connect to |
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| Configuratio | on signal pin, VD[1] during power | Bridge DS for details | ||
VCC through a ferrite bead. |
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| n | up for North Bridge configuration. |
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USB 2.0 PLL Analog Ground. Connect to GND through a |
| Strap_VD0 | AF5 | NB | Strap_VD0 signal state is reflected | Check the | ||
ferrite bead. |
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| Configuratio | on signalpin, VD[0] during power | NorthBridge DS | ||
PLL Analog Power. 2.5V ±5%. Connect to VCC through |
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| n | up for North Bridgeconfiguration. | fordetails |
a ferrite bead. |
| Note: Internal Pullups are present on pins KBCK, KBDT, MSCK, MSDT, SERIRQ, LAD[3:0] |
PLL Analog Ground. Connect to GND through a ferrite |
| Internal Pulldowns are present on all LAN pins |
bead. |
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