8399 N/B Maintenance
Complete PCI sub-system and support enhanced PCI bus commands such as “ Master-Read-Line”, “memory-Read- Multiple” and “Memory-Write-Invalid” commands to minimize snoop overhead. In addition, advanced features are supported such as snoop ahead, snoop filtering, L1 write-back forward to PCI master, and L1 write-back merged with PCI post write buffers to minimize PCI master read latency and DRAM utilization. Delay transaction and read caching mechanisms are also implemented for further improvement of overall system performance.
The VT8235CD “V-Link Client Controller” is a highly integrated PCI /LPC controller. Its internal bus structure is
based on a 66 MHz PCI bus that provides 2x bandwidth compared to previous generation PCI bridge chips. The VT8235CD also provides a 533 MB/sec bandwidth HostDocument/ Cli V-Link int rface with V-Link-PCI and V-Link- LPC controllers. It supports six PCI slots of arbitration and decoding for all integrated functions and LPC bus.
To provide for the increasing number of multimedia applicati ns, the AC97 CODEC VT1617/1617A is integrated
onto the motherboard
Advance configuration and power interface(ACPI).
A full set of software driversConfidentialand utilities are ava ble to allow advanced operating systems such as Windows XP and Windows 2000 to take full advantage of the hardware capabilities such as bus mastering IDE, Plug & Play, and
Following chapters will have more detail description for each individual sub-systems and functions.