8399 N/B Maintenance
5.1 AMD Mobile Athlon 64(ClawHammer) Processor(2)Miscellaneous Pin Descriptions | JTAG Pin Descriptions | ||
Signal Name | Type Description | Signal Name | Type Description |
RESET_L
PWROK
LDTSTOP_L
VID[4:0]
THERMDA
THERMDC THERMTRIP_L
COREFB_H/L
VDDIOFB_H/L CORE_SENSE VDDA VTT_SENSE VDDIO_SENSE VDD VDDIO
VLDT_A
VLDT_B
VTT_A
VTT_B VSS
System Reset | TCK | JTAG Clock | |||
Indicates that voltages and clocks have reached specified | TMS | JTAG Mode Select | |||
| operation | TRST_L | JTAG Reset | ||
HyperTransport™ Technology Stop Control Input. Used for | |||||
TDI | JTAG Data Input | ||||
| power management and for changing HyperTransport link width | ||||
| TDO | JTAG Data Output | |||
| and frequency. | ||||
Voltage ID to the regulator |
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AAnode (+) of the thermal diode A Cathode
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| Clock Pin Descriptions |
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D | 125 ℃. |
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| Signal Na e | Type | Description |
A | Differential feedback for VDD Power Supply |
| CLKIN H/L | ||||
S | Core power supply |
| MiTac |
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A | Differential feedback for VDDIO Power Supply | Secret | Core Clock PLL | ||||
A | VDD voltage monitor pin |
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| FBCLKOUT H/L | |||
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S | Filtered PLL Supply Voltage |
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A |
| Confidential |
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VTT voltage monitor pin |
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A | VDDIO voltage monitor pin |
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S | DDR SDRAM I/O ring power supply |
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S | HyperTransport™ I/O ring power supply for si A and side B |
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| of the package |
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S | VTT regulator voltage for side A a d side B of the die |
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S | Ground |
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Debug Pin Descriptions
Signal Name | Type | Description |
DBREQ_L | Debug Request | |
DBRDY |
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