8399 N/B Maintenance
Supports up to six PCI masters
Peer concurrency
Concurrent multiple PCI master transactions; i.e., allow PCI masters from both PCI buses active at the same time
Zero wait state PCI master and slave burst transfer rate
PCI to system memory data streaming up to 132Mbyte/secDocument(data sent to nor h bridge via high speed
Interface)Secret
PCI master snoop ahead and snoop filtering
Eight DW of CPU to PCI postedMiTacwrite buffers
Byte merging in the write buffers to reduce the number of PCI cycles and to create further PCI bursting
possibilities Confidential
Enhanced PCI command optimization (MRL, MRM, MWI, etc.)
Four lines of post write bu ers from PCI masters to DRAM
Sixteen levels
Delay transaction from PCI master accessing DRAM
Transaction timer for fair arbitration between PCI masters (granularity of two PCI clocks)
Symmetric arbitration between Host/PCI bus for optimized system performance
Complete steerable PCI interrupts
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