8399 N/B Maintenance

1.Engineer Hardware Specification

1.1Introduction

The 8399 motherboard would support the AMD K8 62W Dublin (32 bit) with 256KB L2 cache/ Hammer (64 bit) with 1MB L2 cache with uPGA Package. This system is based on PCI architecture, which have standard hardware

such as AC/Battery Power, Battery, WIRELESS LANSecretstatus,DocumentCD-ROM, HDD, NUM LOCK, CAP LOCK, and SCROLL LOCK status. It also equipped 6 USB2.0 ports.

peripheral interface. The power management complies with Advanced Configura ion and Power Interface (ACPI)

1.0b. It also provides easy configuration through CMOS setup, which is built in system BIOS software and can be

pop-up by pressing F2 at system start up or warm reset. System also provid s icon LEDs to display system status,

The memory subsystem supports 0MB on board; Expandable up to 1024MB Expandable with combination of

optional 128/256/512 MB memory 200-pin DDR 266/333/400 DRAM Memory Module x2, PC-2100/2700/3200

specification.

MiTac

Confidential

 

The “K8N800”chipset is high per ormance, cost-effective and energy efficient solution for the implementation of desktop personal computer systems with 8 / 16-bit 800 / 600 / 400 / 200MHz HyperTransport. CPU host interface based on AMD K8 / ClawHammer. Processors. The K8N800 north bridge supports a high speed 8-bit 8x66 Mhz Quad Data Transfer interconnect (V-Link) to the VT8235 South Bridge. These chips also contain a built-in bus-to- bus bridge to allow simultaneous concurrent operations on each bus. Five levels (double words) of post write buffers are included to allow for concurrent CPU and V-Link operation. For V-Link Host operation, forty-eight levels (double words) of post write buffers and sixteen levels (double words) of prefetch buffers are included for concurrent V-Link bus and DRAM / cache accesses. When combined, the V-Link host / Client controllers realize a

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