8399 N/B Maintenance
5.3 VIA VT8235CD South Bridge(7)General Purpose Inputs |
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Signal Name | Pin # | I/O |
GPI0 (VBAT) | AE2 | I |
GPI1 (VSUS33) | AC2 | I |
GPI2 / EXTSMI# | AA1 | I |
(VSUS33) |
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GPI3 / RING# | Y2 | I |
(VSUS33) |
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GPI4 / LID# | AC1 | I |
(VSUS33) |
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GPI5 / | V4 | I |
BATLOW# |
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(VSUS33) |
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GPI6 / AGPBZ# | AD10 | I |
GPI7 / REQ5# | R3 | I |
GPI12 / GPO12 / | D4 | I |
INTE# |
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GPI13 / GPO13 / | E4 | I |
INTF# |
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GPI14 / GPO14 / | A3 | I |
INTG# |
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GPI15 / GPO15 / | B3 | I |
INTH# |
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GPI16 / | AE1 | I |
INTRUDER# |
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(VBAT) |
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GPI17 / | Y1 | I |
CPUMISS |
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GPI18 / THRM# | Y4 | I |
/ AOLGPI |
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GPI20 / GPO20 / | U1 | I |
ACSDIN2 / |
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PCS0# |
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GPI21 / GPO21 / | V3 | I |
ACSDIN3 / |
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PCS1# / |
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SLPBTN# |
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GPI22 / GPO22 / | R22 | I |
GHI# |
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GPI23 / GPO23 / | P21 | I |
DPSLP# |
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| General Purpose Inputs (Continued) | ||||
Signal Description | Signal Name | Pin # | I/O | Signal Description | |
General Purpose Input 0. Status on PMIO Rx20[0] | GPI26 / GPO26 / | AD1 | I | General Purpose Input 26. Rx95[2] = 1, 95[3] = 0 | |
General Purpose Input 1. Status on PMIO Rx20[1] | SMBDT2 |
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(VSUS33) |
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General Purpose Input 2. Status on PMIO Rx20[4] |
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GPI27 / GPO27 / | AC3 | I | General Purpose Input 27. Rx95[2] = 1, 95[3] = 0 | ||
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General Purpose Input 3. Status on PMIO Rx20[8] | SMBCK2 |
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(VSUS33) |
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General Purpose Input 13. RxE4[4] = 0, 5B[1]=0 |
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| General Purpose Input 28. RxE5[3] = 1, PMIO 4C[28] = | ||
Documentwith OD (open drain) general | |||||
General Purpose Input 4. Status on PMIO Rx20[11] | GPI28 / GPO28 | AC8 | I | ||
| Secret | AB9 | I | General Purpose Input 29. RxE5[3] = 1, PMIO 4C[29] = | |
General Purpose Input 5. Status on PMIO Rx20[12] | GPI29 / GPO29 / | ||||
VRDSLP |
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| 1 |
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| Note: Register references above are Device 17 Function 0 unless indicated otherwise. | |||||
General Purpose Input 6. Status on PMIO Rx20[5] | Note: Defa | lt pin function is underlined in the signal name column above. | |||||
Note: Inp | pin status for the above GPI pins | ||||||
General Purpose Input 7. RxE4[2] = 0 | Note: See also Power Management I/O register Rx50 for input pin change status for | ||||||
General Purpose Input 12. RxE4[4] = 0, 5B[1]=0 |
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N te: See also Power Management I/O register Rx52 for SCI/SMI select for | |||||||
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Confidential | Note: See also Power Management I/O register Rx4C. General purpose input pins | ||||||
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General Purpose Input 14. RxE4[4] = 0, 5B[1]=0 |
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General Purpose Input 15. | RxE4[4]MiTac= 0, 5B[1]=0 | Programmable Chip Selects |
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General Purpose Input 16. | Status PMIO Rx20[6] |
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Signal Name | Pin # | I/O | Signal Description | ||||
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| PCS0# / GPIO20 | U1 | O | Programmable Chip Select 0. RxE4[6]=1, E5[1]=1 | ||
General Purpose Input 17. | Status on PMIO Rx20[5] | / ACSDIN2 |
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| PCS1# / GPIO21 | V3 | O | Programmable Chip Select 1. RxE4[6]=1, E5[2]=1 | ||
General Purpose Input 18. | Rx8C[3] = 0 | / ACSDIN3 / |
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| SLPBTN# |
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General Purpose Input 20. RxE4[6]=1, E5[1]=0,
PMIO 4C[20] = 1
General Purpose Input 21. RxE4[6]=1, E5[2]=0
PMIO 4C[21] = 1
General Purpose Input 22. RxE5[3] = 1, PMIO 4C[22] = 1
General Purpose Input 23. RxE5[3] = 1, PMIO 4C[23] = 1
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