8399 N/B Maintenance
5.2 VIA K8N800 North Bridge(7)Integrated Graphics Power and Ground
Signal Name | Pin # | I/O |
VCCDAC | B2 | P |
GNDDAC | C3, D4 | P |
VCCRGB | A4 | P |
GNDRGB | B4 | P |
VCCPLL1 | D5 | P |
GNDPLL1 | C5 | P |
VCCPLL2 | A5 | P |
GNDPLL2 | B5 | P |
VCCPLL3 | A6 | P |
GNDPLL3 | B6 | P |
Signal Description |
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DAC Voltage. 3.3V ±5% connected via ferrite bead for |
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isolation of digital switching noise. |
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DAC Ground. Connect to main ground plane. |
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Power for CRT RGB Outputs. 3.3V ±5% connected via |
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ferrite bead for isolation of digital switching noise |
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Connection point for RGB Load Resistors. Connect to main |
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ground plane via ferrite bead for isolation of digital switching | Secret | |||
noise. |
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Power for Graphics Controller PLL1 | ||||
±5% connected via ferrite bead for isolation of digital | ||||
switching noise. |
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Ground for Graphics Controller PLL1 | ||||
Connect to main ground plane via ferrite bead for isolation of | ||||
digital switching noise. | ||||
Power for Graphics Controller PLL2 | ||||
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±5% connected via ferrite bead for isolation of digit l |
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switching noise. |
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Ground for Graphics Controller PLL2 |
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Connect to main ground plane via ferrite bead for isola ion of |
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digital switching noise. |
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Power for Graphics Controller PLL3MiTac(“LCD Clock”). 1.5V |
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±5% connected via ferrite bead for isolation of digital |
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switching noise. |
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Ground for Graphics Controller PLL3 (“LCD Clock”). |
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Connect to main ground plane via err te bead for isolation of |
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digital switching noise. |
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| Confidential |
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